Circuitos Integrados

MAX1085ACSA+T

MAX1085ACSA+T - 400ksps 10-Bit Serial ADC | Maxim Integrated

The Maxim Integrated MAX1085ACSA+T is a 10-bit, 400ksps (max), single-supply, low-power, successive-approximation analog-to-digital converter (SAR ADC) with an internal +2.5V reference and serial (SPI/QSPI/MICROWIRE-compatible) interface, packaged in an 8-pin SOIC. It accepts a single analog input channel and combines a high-bandwidth track/hold, an internal reference, and low-power operation in a compact 8-pin SO footprint, targeting portable and remote-sensor data-acquisition applications. A SAR ADC is a type of analog-to-digital converter that uses a successive-approximation register to perform a binary search across an internal resistive ladder (or charge-redistribution capacitor array), producing one bit per clock cycle. SAR ADCs are valued for their deterministic latency (one conversion = N clock cycles), excellent DC linearity, intrinsic anti-alias filtering (no SHA in the feedback path of a sigma-delta), and low power consumption compared to flash or pipelined architectures. The MAX1085ACSA+T sits in the data-acquisition IC -> ADC -> SAR ADC -> 10-bit single-channel ADC -> precision signal-chain IC taxonomy, often used as a successor to legacy 12-bit pin-compatible parts like the MAX1242/MAX1243 when higher throughput is needed. Key features include a maximum sampling rate of 400ksps (MAX1085) versus 300ksps (MAX1084), an internal +2.5V reference (eliminating external reference components and saving PCB area), a single +2.7V to +5.5V analog supply, a low-power shutdown mode that drops supply current to under 1µA between conversions, an SPI/QSPI/MICROWIRE-compatible serial interface, and an 8-pin SOIC package rated for the 0°C to +70°C commercial temperature range (the +T suffix denotes tape-and-reel packaging). The MAX1085 uses a charge-redistribution SAR architecture with an integrated input track/hold, providing 10-bit no-missing-code performance, low integral nonlinearity (INL), and low differential nonlinearity (DNL). The internal reference is factory-trimmed, eliminating external reference noise and drift. The serial interface shifts out conversion results MSB-first, simplifying connection to microcontrollers, DSPs, and FPGA signal-chain front ends. Typical applications include portable data loggers, remote sensor digitizers (strain gauges, thermocouples with amplification), handheld instrumentation, pen-tablet digitizers, and battery-powered medical or industrial monitoring nodes. The low shutdown current makes it well suited to duty-cycled sampling on battery rails. When designing with this device, observe the analog input range relative to VDD (the input cannot exceed VDD + 0.3V), place a 0.1µF bypass capacitor close to VDD, and follow the serial-interface timing diagram exactly. The MAX1085ACSA+T is a drop-in functional equivalent of the MAX1085BCSA+T (the B-grade offers tighter linearity specifications but shares the same 8-pin SO footprint) and the MAX1084ACSA+T (lower 300ksps throughput, same footprint).

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MAX108CHC-B50105

MAX108CHC-B50105 - 1.5Gsps 8-Bit ADC with T/H, PECL | Maxim

The Maxim Integrated MAX108CHC-B50105 is a PECL-compatible 8-bit ultra-high-speed analog-to-digital converter (ADC) that samples at 1.5 Gsps with an analog input bandwidth of 2.2 GHz. Housed in a 192-ball LBGA (chip-scale BGA) package, it integrates a high-performance track-and-hold (T/H) amplifier and a flash quantizer on a single monolithic die fabricated on Maxim's proprietary advanced GST-2 bipolar process. An 8-bit ADC (analog-to-digital converter) is a data-conversion integrated circuit that translates a continuous-time analog signal into an 8-bit digital code at a specified sample rate. High-speed 8-bit ADCs sit in the broader data-converter hierarchy (ADC > data converter > mixed-signal IC > semiconductor) and are typically used to digitize fast transient or RF signals where GHz-class analog bandwidth and multi-hundred-MHz sampling are required. The MAX108's flash architecture means conversion happens in a single clock cycle, making it one of the fastest ADC topologies available. Key specifications include 1.5 Gsps minimum sample rate, 2.2 GHz full-power input bandwidth, PECL (positive emitter-coupled logic) compatible digital outputs for low-jitter interfacing with FPGAs or high-speed ASICs, and integrated track-and-hold that eliminates the need for an external high-bandwidth sampler. The B-grade -B50105 suffix denotes the commercial temperature grade and the B50105 characterization/test option. The MAX108 uses an innovative differential flash architecture with on-chip calibration, providing low integral nonlinearity and aperture jitter. The integrated T/H holds the analog input stable during conversion, eliminating code-dependent aperture errors that plague many simpler flash designs. The internal PECL drivers deliver well-defined edges into 50 ohm loads, simplifying interface to high-speed FPGAs and demultiplexer ASICs. Typical applications include digital oscilloscopes, radar signal processing, direct RF digitization in software-defined radio, broadband test and measurement instrumentation, and high-energy physics data acquisition. The 2.2 GHz analog bandwidth makes the part suitable for undersampling IF signals as well as direct baseband sampling. When designing with the MAX108, use controlled-impedance differential signal traces for the analog inputs and matched-length PECL traces for the digital outputs to preserve the device's 1.5 Gsps performance. Decouple each supply pin with a separate 0.1 uF ceramic capacitor placed as close as possible to the BGA ball, and provide an external low-jitter PECL clock source meeting the device's aperture-jitter budget. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the standalone manufacturer datasheet, helping procurement and design engineers shorten evaluation cycles for this specialty ultra-high-speed ADC.

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MAX108CHC-D

MAX108CHC-D - 1.5Gsps 8-Bit Ultra-High-Speed ADC ESBGA-192 | Maxim

The MAX108CHC-D from Maxim Integrated (now part of Analog Devices) is a PECL-compatible, 1.5Gsps, 8-bit ultra-high-speed analog-to-digital converter that enables accurate digitizing of analog signals with analog input bandwidths to 2.2 GHz. Housed in a 25 mm x 25 mm, 192-contact Enhanced Super Ball-Grid Array (ESBGA), the part is specified over the commercial 0C to +70C temperature range and is sampled at 1.5 billion samples per second. An ADC (analog-to-digital converter) is a semiconductor device that samples a continuous-time analog signal and quantizes each sample into a finite-resolution binary code, forming the critical bridge between the analog RF/IF front end and the digital signal processing back end. Within the converter family tree, the MAX108 belongs to flash ADC architecture -> high-speed ADC -> data converter -> signal chain IC. Flash ADCs use paralleled comparators to deliver single-cycle conversion, achieving the highest sampling rates available in monolithic silicon. Key features include ±0.25 LSB INL and DNL linearity, 7.5 effective bits at fIN = 750 MHz (Nyquist frequency), 50-ohm differential analog inputs, a PECL-compatible digital output interface, and an on-chip track-and-hold amplifier rated to 2.2 GHz full-power bandwidth. The device is fabricated on Maxim's proprietary GST-2 advanced bipolar process, allowing the track-and-hold and quantizer to coexist on a single monolithic die at multi-GHz analog speeds. The architecture pairs an innovative 2.2 GHz input T/H with an internally-latched flash quantizer core, which minimizes aperture uncertainty and eliminates the need for an external high-bandwidth sample-and-hold. This integrated approach simplifies board design, reduces component count, and shortens critical analog paths on the PCB—key for capturing repetitive single-shot events at sub-nanosecond timing accuracy. Typical applications include digital oscilloscopes, wideband test and measurement instrumentation, radar and EW (electronic warfare) IF digitizers, high-end spectrum analyzer capture front-ends, satellite communication receivers, and medical imaging systems such as ultrasound beamformers that require high analog bandwidth with moderate resolution. When designing with this device, note that the 192-ball ESBGA requires controlled-impedance PCB stackup, laser-via escape routing, and a solid ground/power plane beneath the die to deliver the rated 1.5 Gsps performance. Decoupling must include a ferrite bead plus 0.1uF/10uF/47uF capacitance placed within 5 mm of each supply pin to suppress switching noise from the PECL output drivers. This page synthesizes distributor pricing, drop-in alternatives, pin-out guidance, and practical PCB layout notes not found aggregated in the standalone datasheet, helping engineers shorten evaluation cycles for high-speed ADC prototyping.

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MAX1090BEEI

MAX1090BEEI - 400ksps 8/4-Ch 10-Bit SAR ADC | Maxim Integrated

The Maxim Integrated MAX1090BEEI is a 400 ksps, +5V, 8-/4-channel, 10-bit analog-to-digital converter (ADC) with a built-in +2.5V reference and a high-speed byte-wide parallel interface, housed in a 28-pin QSOP package. It combines a successive-approximation register (SAR) architecture with automatic power-down, 2 µs wake-up, an on-chip clock, and an integrated +2.5V reference, delivering up to 400,000 samples per second across 8 single-ended or 4 differential analog input channels. An ADC (Analog-to-Digital Converter) is a mixed-signal integrated circuit that converts continuous analog voltages into discrete digital codes. SAR (Successive Approximation Register) ADCs use a binary-search algorithm with an internal DAC and comparator, offering an excellent trade-off between speed, accuracy, and power consumption for multi-channel data-acquisition systems. Within the broader taxonomy, the MAX1090BEEI belongs to successive-approximation ADCs -> data converters -> mixed-signal ICs -> signal chain -> semiconductor ICs. Key features include 400 ksps maximum sampling rate, 10-bit resolution, 8 single-ended or 4 differential input channels, an integrated +2.5V reference (4.0 V/V input range when using internal reference with 5 V supply), automatic hardware power-down between conversions, parallel-architecture start/stop control, and a high-speed byte-wide parallel output bus. The MAX1090 is the 8-channel variant in the 28-pin QSOP; the MAX1092 is the 4-channel variant in the 24-pin QSOP. The SAR core uses a charge-redistribution DAC with a precision comparator, and the integrated +2.5V reference eliminates the need for an external reference IC. The on-chip T/H (track-and-hold) supports input bandwidths suitable for multiplexed multi-channel acquisition, while the parallel interface simplifies connection to microcontrollers, DSPs, and FPGAs without requiring a serial-clock generator. Typical applications include industrial process-control and data-acquisition systems, portable instrumentation and battery-powered data loggers, medical instruments and patient monitors, multichannel sensor interfaces (temperature, pressure, strain), and automotive telemetry subsystems. The wide analog input range and parallel output are well matched to legacy 8-bit/16-bit MCU buses. When designing with this device, note that the MAX1090BEEI has been obsoleted (no longer manufactured); stock exists at authorized distributors but is finite. Designers should validate lifecycle status before committing to new designs. Refer to the manufacturer datasheet for full pinout, timing diagrams, and reference decoupling recommendations.

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MAX1091ACEI+T

MAX1091ACEI+T - 250ksps 10-Bit 8-Ch ADC w/ 2.5V Ref | Maxim

The Maxim Integrated (Analog Devices) MAX1091ACEI+T is a 250 ksps, low-power, 10-bit, 8/4-channel analog-to-digital converter (ADC) with an on-chip +2.5V reference and a high-speed byte-wide parallel interface, housed in a 28-pin QSOP package. The device operates from a single +3V supply, features automatic power-down between conversions, and wakes up in 2 us, making it suitable for power-conscious multi-channel data-acquisition systems. The internal 2.5V reference eliminates the need for an external reference IC in typical applications. A successive-approximation register (SAR) ADC is a converter architecture that digitizes an analog input by performing a binary search through an internal precision DAC over one or more clock cycles per conversion. SAR ADCs are valued for their deterministic latency, low power consumption, no pipeline delay, and strong AC performance at moderate sample rates - characteristics that position them between flash converters (fastest, lowest resolution) and sigma-delta ADCs (highest resolution, slower). The MAX1091 belongs to the broader category of data converters / signal conditioning ICs within the analog semiconductor family. Its 8 single-ended or 4 pseudo-differential input channels, byte-wide parallel output, and integrated reference make it a complete system-level analog front-end for embedded designs. Key features include 8 analog input channels (configurable as 4 pseudo-differential pairs), a +2.5V internal reference, automatic power-down with 2 us wake-up, an internal conversion clock, and a high-speed byte-wide parallel digital interface. The +3V single-supply operation simplifies power tree design in 3.3V systems, and the auto-power-down function dramatically reduces average current draw in low-duty-cycle applications such as battery-powered instrumentation. The MAX1091 uses a classic SAR core with a sample-and-hold front end configured as MUX-S/H-ADC with a 1:1 input-to-ADC ratio. The high-speed parallel interface allows direct connection to microcontrollers, DSPs, or FPGAs without glue logic, while the internal reference removes a typical external component and PCB area. The 28-pin QSOP package balances compactness with hand-solder-friendly lead pitch, supporting both high-density and prototype builds. Typical applications include portable data loggers, multi-channel sensor interfaces (temperature, pressure, strain), industrial process control, patient monitors and point-of-care diagnostics, and optical encoders. The combination of 10-bit resolution and 250 ksps throughput is well-matched to these mid-bandwidth, multi-channel systems where deterministic conversion timing is important. When designing with the MAX1091, ensure that the supply decoupling network (typically 0.1 uF ceramic in parallel with 4.7 uF bulk) is placed within a few millimetres of the AVDD and DVDD pins. Use the internal reference (REF bypassed with 0.1 uF) unless absolute accuracy below +/-1 LSB is required - in that case, drive REF with an external low-drift reference and account for that reference's settling behavior at full sample rate. This page consolidates distributor pricing, parametric specifications, drop-in alternatives, and PCB design guidance not found in the standalone datasheet, enabling faster part selection and qualification.

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MAX1091BCEI+T

MAX1091BCEI+T - 250ksps 10-Bit 8-Ch ADC | Maxim Integrated | QSOP-28

The Maxim Integrated (Analog Devices) MAX1091BCEI+T is a low-power, 10-bit, 250 ksps successive-approximation analog-to-digital converter (ADC) with 4 or 8 input channels, an internal +2.5 V reference, and a high-speed parallel interface, housed in a 28-pin SSOP/QSOP package. An ADC (analog-to-digital converter) is a data-acquisition integrated circuit that samples continuous analog voltage signals and encodes them into discrete digital codes for use by microcontrollers, DSPs, or processors. Successive-approximation register (SAR) ADCs like the MAX1091BCEI+T sit in the broader data-converter taxonomy between lower-speed delta-sigma and higher-speed flash architectures, offering a balanced trade-off of speed, accuracy, and power consumption. They are widely used in industrial control, instrumentation, motor control, and portable battery-powered monitoring systems where mid-range sampling rates (10 ksps to 1 Msps) are sufficient. Key features of the MAX1091BCEI+T include 250 ksps sampling rate across 8 single-ended or 4 differential input channels, an internal +2.5 V reference (eliminating the need for an external reference chip), automatic power-down between conversions with 2 microseconds wake-up time, an on-chip clock, and a byte-wide parallel digital interface. The architecture integrates a track-and-hold amplifier ahead of the SAR core so the input remains stable during the conversion cycle, allowing accurate acquisition of multiplexed channels at full speed. From an electrical perspective, the device operates from a single +3 V supply, draws only a few milliamps during active conversion, and reduces to microamp-level current in power-down mode. This makes it well suited to battery-powered or power-budgeted embedded designs. The internal +2.5 V reference typically offers ±25 ppm/°C temperature drift or better, removing the BOM cost of an external shunt reference and the associated board area in space-constrained layouts. Typical applications include multi-channel data-acquisition front ends in industrial PLCs, process-control sensor read panels, handheld digital multimeters, motor-current monitoring in variable-frequency drives, and portable medical monitoring instrumentation. The combination of selectable 4-/8-channel input MUX, internal reference, and parallel interface reduces external component count, accelerating design-in versus discrete ADC + op-amp + reference chains. When designing with this part, ensure the digital interface signals are routed away from analog inputs to minimize digital-to-analog crosstalk. Decouple AVDN and DVDD separately with 0.1 µF ceramic caps close to the pins. The reference decoupling capacitor value is given in the Maxim datasheet and must not be omitted, since it sets reference settling bandwidth. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the Maxim datasheet alone, giving an engineer a single reference for selection, sourcing, and PCB integration of the MAX1091BCEI+T.

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MAX1091BEEI+T

MAX1091BEEI+T - 10-Bit 250ksps 8-Ch SAR ADC w/ Reference | Maxim

The Maxim Integrated MAX1091BEEI+T is a 250 ksps, +3 V, 8-channel, 10-bit successive-approximation analog-to-digital converter (SAR ADC) with an internal +2.5 V reference and a byte-wide parallel interface, housed in a 28-pin QSOP (EIAJ) package. It combines low power consumption, automatic power-down between conversions, 2 µs wake-up, and a separate VLOGIC pin that lets the digital interface run from +1.8 V to +5.5 V while the analog core stays on a single +3 V supply. An ADC (analog-to-digital converter) is a mixed-signal integrated circuit that quantizes a continuous analog input voltage into a discrete binary code. Within the broader taxonomy, the MAX1091 belongs to SAR ADCs -> data converters -> data acquisition ICs -> signal chain -> semiconductor. SAR architectures use a binary-search capacitor DAC and a single comparator to resolve N bits in N clock cycles, trading speed for excellent DC accuracy, intrinsic monotonicity, and zero pipeline latency. That makes them the dominant choice for multiplexed multi-channel systems, precision instrumentation, and control loops where a deterministic per-channel conversion time matters more than raw throughput. Key differentiating features of the MAX1091 include 8 single-ended analog input channels (vs. 4 on the MAX1093), 250 ksps maximum sample rate, true 10-bit linearity with no missing codes, an internal +2.5 V reference (also usable as an external drive), hardware- and software-configurable power-down modes that drop supply current to microamp levels between conversions, and an on-chip 4 MHz SAR oscillator that eliminates the need for an external clock. The wide +1.8 V to +5.5 V VLOGIC range lets the part drop directly onto the bus of 1.8 V DSPs, 2.5 V FPGAs, 3.3 V ASICs or 5 V microcontrollers without level shifters. Architecturally, the device integrates an 8:1 input mux, a fully differential switched-capacitor DAC, an internal +2.5 V bandgap reference, a comparator, a successive-approximation register, a wide parallel output latch, and the power-down/wake-up sequencer. Automatic power-down between conversions keeps average current extremely low in low-duty-cycle applications; in continuous 250 ksps operation the part draws a few milliamps from AVDD and a fraction of that from DVDD. Typical applications include 4–20 mA sensor-conditioning front ends, portable data loggers, battery-powered medical instrumentation, multi-channel PLC analog input modules, and touch/position sensing front ends. The +3 V single-supply operation, internal reference and tiny QSOP-28 footprint also make it attractive for space-constrained designs that still need more than 4 channels. When designing with this part, observe the AVDD/DVDD decoupling guidelines in the Maxim datasheet: place a 0.1 µF ceramic close to each supply pin and a bulk tantalum or ceramic on AVDD, keep analog input traces short and guarded, and bypass REF to AGND with the recommended 4.7 µF capacitor to minimize reference noise. The internal reference has limited drive capability, so treat REF as a low-current bias node, not a system rail.

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MAX1092BEEG

MAX1092BEEG - 400ksps 10-Bit 4-Ch ADC +2.5V Ref | Maxim Integrated

The Maxim Integrated MAX1092BEEG is a 400 ksps, 10-bit, +5V, 4-/8-channel successive-approximation analog-to-digital converter (ADC) with an internal +2.5V reference and a high-speed byte-wide parallel interface, housed in a 24-pin QSOP package (B = industrial temperature grade). It combines four analog input channels (eight single-ended or four pseudo-differential, software-configurable) with automatic power-down between conversions and a fast 2 µs wake-up time, dramatically reducing average supply current in low-duty-cycle applications such as battery-powered data acquisition. A successive-approximation ADC (SAR ADC) is a type of analog-to-digital converter that converts an analog input signal to a digital code using a binary search through successive approximations against an internal DAC and comparator. SAR ADCs sit in the data-converter taxonomy between flash converters (fastest, lowest resolution) and sigma-delta converters (highest resolution, lowest speed), and are favored for medium-resolution (8-16 bit), medium-speed (10 ksps to 10 Msps) multi-channel applications where deterministic latency and low power consumption matter more than absolute noise floor. Key features include 400 ksps maximum sample rate, 10-bit resolution with ±0.5 LSB INL (typ), a +2.5V internal reference (4 ppm/°C drift typical), single +5V analog supply operation, and a 2.7V-to-5.5V digital supply range that simplifies interfacing to 3V microcontrollers. The integrated track-and-hold, on-chip clock, and parallel byte-wide interface eliminate external glue logic and shorten firmware integration time. Automatic power-down drops supply current between conversions, with wake-up times around 2 µs allowing burst-mode sampling at very low average current. Typical applications include industrial process control and instrumentation, multichannel data-acquisition front ends, pen-digitizers and tablet digitizing systems, medical instrumentation front ends, and battery-powered portable measurement systems. Designers choose the MAX1092BEEG when they need a low-power, pin-compatible upgrade path from the older MAX197 family or a faster alternative to slower I²C/SPI ADCs in a small 24-pin QSOP. When designing with this part, place 0.1 µF and 10 µF decoupling capacitors close to AVDD and DVDD, keep analog and digital ground planes joined at a single point near the ADC, and use the software-configurable analog input channel scan mode (sequential or one-shot) via the parallel control byte. For best DC accuracy, average multiple conversions when the input is near full-scale and verify reference stability with the internal +2.5V source before relying on absolute calibration. The MAX1092BEEG is part of the MAX1090/MAX1091/MAX1092/MAX1093 family, where MAX1090 offers 8 channels in 28-pin QSOP, MAX1092 offers 4 channels in 24-pin QSOP, and MAX1091/MAX1093 are pin-compatible +3V variants. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

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MAX1093AEEG

MAX1093AEEG - 250ksps 4-Ch 10-Bit ADC +2.5V Ref | Maxim Integrated

The Maxim Integrated MAX1093AEEG is a 250 ksps, 10-bit successive-approximation analog-to-digital converter (SAR ADC) with 4 single-ended / 2 pseudo-differential input channels, a +2.5V internal reference, automatic power-down, fast 2us wake-up, an on-chip clock, and a high-speed byte-wide parallel interface, housed in a 24-pin QSOP package. An SAR (Successive Approximation Register) ADC is a type of data converter that converts an analog input voltage into a digital code using a binary-search algorithm implemented by switching an internal capacitive DAC. SAR ADCs sit in the broader hierarchy of analog-to-digital converters (ADC -> data converter -> mixed-signal IC -> power management and signal-chain semiconductor). The MAX1093AEEG occupies the low-power, medium-speed tier of this hierarchy, optimized for portable instrumentation and battery-powered data acquisition systems where the combination of modest 250 ksps throughput, integrated reference, and automatic power-down enables long battery life without sacrificing conversion fidelity. Key features of the MAX1093AEEG include an INL of 0.5 LSB (max), an input voltage range of 0 to +2.5V (single-ended) or +/-1.25V (pseudo-differential), 2 us wake-up from power-down, 4-channel analog input multiplexer, and an internal +2.5V reference. The integrated reference eliminates external reference circuitry and reduces PCB area, while the parallel interface allows direct connection to microcontrollers and DSPs without glue logic. The MAX1093AEEG uses a charge-redistribution DAC architecture for the successive-approximation conversion. Automatic power-down between conversions reduces supply current to microampere levels, making the part well-suited for battery-powered applications. The internal +2.5V reference is trimmed for low drift, and the analog inputs feature a sample-and-hold stage that accepts rapidly changing signals without an external track-and-hold amplifier. Typical applications include portable data loggers, pen-input digitizers, industrial process control, patient monitoring, and instrumentation where 10-bit resolution is sufficient and low power consumption is critical. The MAX1093AEEG also fits well in test and measurement front-ends and signal-conditioning subsystems requiring multiple input channels. When designing with the MAX1093AEEG, ensure the input signal does not exceed the supply voltage (VDD up to +3.6V) or the reference voltage. Add a 100nF decoupling capacitor close to the AVDD pin and a 10uF bulk capacitor to filter low-frequency supply noise. Drive the analog inputs with low-impedance sources to maintain AC performance, and consider the input mux settling time when sequencing channel reads. This page synthesizes distributor pricing, drop-in alternatives (including the +5V MAX1092BEEG and the 8-channel MAX1091 family), and practical design notes not found in the manufacturer datasheet alone.

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MAX1093BEEG

MAX1093BEEG - 250ksps 10-Bit 4-Ch ADC +2.5V Ref | Maxim Integrated

The Maxim Integrated MAX1093BEEG is a 250 ksps, 10-bit, +3V, 4-/2-channel successive-approximation analog-to-digital converter (ADC) with an internal +2.5V reference and a high-speed byte-wide parallel interface, housed in a 24-pin QSOP package. The MAX1093 channel-count variant offers 4 single-ended analog inputs (2 in pseudo-differential mode), while the larger MAX1091 sister device offers 8 single-ended channels in a 28-pin QSOP. Body-to-breadboard, the B-suffix indicates ±1 LSB INL (max) over the -40°C to +85°C industrial temperature range. An SAR ADC is a successive-approximation register type analog-to-digital converter that converts an input voltage to a digital code using a binary search algorithm against an internal DAC and comparator. SAR ADCs occupy a middle ground in the converter hierarchy between flash ADCs (fastest, lowest resolution) and sigma-delta ADCs (slowest, highest resolution). They typically offer resolutions from 8 to 18 bits with sample rates up to a few Msps, and are favored when low latency and deterministic aperture are required. Key features of the MAX1093BEEG include 250 ksps sampling rate, ±1 LSB INL, ±1 LSB DNL, true-differential analog inputs, automatic power-down between conversions, 2 µs wake-up time, an on-chip +2.5V reference (with REFADJ for external adjustment), and an external analog input range that extends to the supply rails. Power consumption at 250 ksps is approximately 5.7 mW from a single +2.7V to +3.6V supply, dropping to microwatts during auto power-down. The MAX1093BEEG uses a charge-redistribution DAC and an internal clock, eliminating the need for an external clock source in most applications. Parallel byte-wide output enables direct connection to microcontrollers and DSPs without glue logic. The high-speed parallel interface supports both separate-byte and word-wide read modes and includes a standard CS/RD handshake that maps naturally to a 74HC573 latch or directly to a microcontroller bus. Typical applications include data-acquisition systems, pen digitizers and touch screens, industrial process control and instrumentation, portable battery-powered equipment, and low-cost DSP front-ends. The combination of 4-channel input multiplexing and +2.5V internal reference simplifies board layout in multi-channel embedded systems. When designing with the MAX1093BEEG, place the 0.1 µF bypass capacitor at the supply pin and keep the analog input traces short and guarded to preserve INL. Use the automatic power-down mode aggressively between conversions to minimize average current in battery-powered systems. This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design guidance not found in the manufacturer datasheet alone.

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MAX109EHF+

MAX109EHF+ - 8-Bit 2.2Gsps ADC with Track/Hold | Maxim Integrated

The Maxim Integrated MAX109EHF+ is an 8-bit, 2.2 Gsps analog-to-digital converter with an integrated track-and-hold amplifier and 1:4 demultiplexed LVDS outputs, housed in a 256-ball SBGA package measuring 27 x 27 mm with 1.27 mm ball pitch. It converts full-scale analog input bandwidths exceeding 1.5 GHz into eight bits at update rates up to 2.2 Gigasamples per second, with dynamic performance typically better than 43 dB SNR and 57 dB spurious-free dynamic range at low input frequencies. An 8-bit ADC (analog-to-digital converter) is a data-acquisition component that samples continuous analog signals and quantizes them into one of 2^8 = 256 discrete digital codes per conversion. Within the broader IC hierarchy, the MAX109EHF+ falls under data converters -> ADCs -> flash / high-speed ADC -> mixed-signal IC, and typically appears in the signal chain immediately after a wideband front-end amplifier or downconverter and before a digital FPGA or ASIC processor. Key features include a differential analog input with 50-ohm on-chip termination, an internal bandgap reference for excellent gain and offset stability, and a 1:4 LVDS output demultiplexer that relaxes downstream FPGA capture clock rates by one-quarter. The integrated track-and-hold amplifier (THA) provides sub-picosecond aperture jitter, preserving dynamic range for high-frequency analog input bands. The LVDS interface supports both DDR (double data rate) and SDR clocking, easing timing closure in dense digital back-ends. Architecturally, the MAX109EHF+ uses a high-speed flash core preceded by a track-and-hold input stage, which captures a 2.2 GHz instantaneous analog bandwidth and presents a settled sample to the comparators. The 1:4 output demultiplexing minimizes the per-channel output data rate to roughly 550 Mbps per LVDS pair, simplifying PCB routing and easing FPGA pin-count pressure in multi-channel systems. Typical applications include digital oscilloscopes, radar and Lidar baseband digitizers, broadband communications test equipment, electronic countermeasures (ECM), and high-end medical imaging such as ultrasound front-ends. In each of these systems the converter's 2.2 Gsps sample rate preserves Nyquist margin for input bandwidths up to approximately 1 GHz with eight-bit resolution. When designing with the MAX109EHF+, pay particular attention to analog input signal integrity: route the 50-ohm transmission line through a controlled-impedance layer, place decoupling networks within 1 mm of AVDD and AVSS balls, and isolate the LVDS outputs from the analog input with a GND guard ring. Thermal management is also critical because the SBGA package dissipates roughly 3.5 W at full sample rate and full-scale input, requiring thermal vias and forced airflow in production environments. This page synthesizes distributor pricing, same-family drop-in alternatives within the SBGA-256 footprint, and practical design notes not found in the manufacturer datasheet, organized to help procurement engineers and hardware designers make a confident sourcing decision as of October 2026.

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MAX109EHF-D

MAX109EHF-D - 8-Bit 2.2Gsps ADC with T/H and LVDS | Maxim

The Maxim Integrated (Analog Devices) MAX109EHF-D is a monolithic 8-bit, 2.2 Gsps analog-to-digital converter (ADC) with an integrated track-and-hold amplifier and a 1:4 demultiplexed LVDS digital output stage, packaged in a 256-ball LBGA. It digitizes analog signals up to 2.5 GHz input bandwidth, achieving full-scale differential input range of 500 mV-P for accurate capture of high-frequency IF and RF signals. A high-speed ADC is a data converter that samples an analog input at a rate equal to or greater than twice the highest input frequency component, producing a digital word whose magnitude is proportional to the instantaneous input voltage. At 2.2 Gsps the MAX109EHF-D sits in the high-speed converter tier above general-purpose ADCs (typically 1 Msps to 250 Msps) but below the highest-end oscilloscope-grade parts (>5 Gsps). It belongs to the broad hierarchy of data converters -> ADCs -> high-speed ADCs -> interleaved flash ADCs, used wherever an analog waveform must be frozen and quantized into digital words with minimal aperture delay. Key features include the on-chip differential track-and-hold that reduces aperture uncertainty, the 1:4 LVDS output demultiplexer that lowers each output lane to 550 MHz to ease FPGA capture, and a 3.0 V to 3.6 V LVDS supply rail that interfaces directly to 3.3 V-referenced FPGAs. An analog supply of -5.2 V plus a 5 V analog rail power the input core, and the part supports interleaving of two MAX109 devices to reach 4.4 Gsps aggregate rate for two-channel direct-IF digitization. The device uses a pipelined multi-stage flash architecture fabricated on Maxim's advanced low-voltage silicon process, achieving 48 dB SNR and 60 dB SFDR typical at 2.2 Gsps with a 500 MHz input. The integrated T/H front end has sub-picosecond aperture jitter, which preserves SNR on IF frequencies beyond 1 GHz where aperture jitter dominates total noise. Typical applications include direct-IF digitization in software-defined radio receivers, radar I/Q baseband digitizers, digital oscilloscope front-end channels, high-speed test-and-measurement instrumentation, and broadband communications test gear. The 1:4 demuxed LVDS output is also well matched to FPGA LVDS receivers in multi-gigasample capture systems. Designers should route LVDS outputs with 100 ohm differential impedance, keep analog and digital grounds separated until they join at the regulator, and provide solid low-ESL decoupling on all supply pins. The die-to-package thermal path of the LBGA-256 benefits from a stitched ground via array under the exposed pad to keep junction temperature within the industrial range. This page synthesizes distributor pricing, drop-in pin-compatible alternatives, and practical PCB and signal-integrity design notes not always covered in the manufacturer's datasheet, making it a one-stop reference for engineers qualifying MAX109EHF-D into new and legacy designs.

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MAX11040GUU+T

MAX11040GUU+T - 24-Bit 4-Ch Simultaneous-Sampling Sigma-Delta ADC | Maxim Integrated

The Maxim Integrated MAX11040GUU+T is a 24-bit, 4-channel, simultaneous-sampling, cascadable, sigma-delta analog-to-digital converter (ADC) housed in a 38-pin TSSOP package. The part integrates four sigma-delta modulator channels and a digital filter, allowing per-channel 24-bit conversion results with no inter-channel sampling skew. The cascadable digital interface allows up to eight MAX11040 devices (32 channels) to be synchronized to a single external clock, which is critical for multi-axis power monitoring and three-phase energy metering. Sigma-delta ADCs are a class of oversampling converters that trade off converter speed for very high resolution by pushing quantization noise to high frequencies where a digital filter can remove it. The MAX11040 sits in the precision-measurement sub-segment of the data-converter hierarchy: precision ADC -> ADC -> data converter -> signal chain IC -> semiconductor. The simultaneous-sampling topology in particular addresses applications where phase or amplitude relationships between channels must be preserved, something that multichannel SAR or successive-approximation ADCs cannot do without external track-and-hold amplifiers. Key features include 24-bit no-missing-code resolution, simultaneous sampling across all four input channels, an integrated digital filter with programmable output data rates, a low-drift internal reference, and a cascadable serial interface that supports up to 32 synchronized channels. The TSSOP-38 footprint keeps the converter in a moderately small surface-mount outline while exposing enough ground pins for the mixed-signal layout that a 24-bit sigma-delta demands. Architecturally the device combines four switched-capacitor sigma-delta modulators with a shared digital filter block, all clocked from one external master clock. The internal clock-divider and decimation-filter chain can be programmed via the serial interface to trade conversion rate (up to a few ksps per channel) for effective resolution, which is the canonical sigma-delta trade-off curve. The result is a converter that delivers high effective number of bits (ENOB) at low input bandwidths where industrial sensors normally operate. Typical applications include three-phase power metering, multi-cell battery monitoring, industrial process control loops, vibration and acoustic analysis arrays, and precision data-acquisition front ends. The cascadable synchronization is especially useful in polyphase energy meters where accurate phase-angle measurement between current and voltage channels is required for class-0.2 or class-0.5 revenue-grade accuracy. When designing with this part, allocate a dedicated analog ground island and keep digital return currents away from the input traces; a 24-bit sigma-delta is only as good as its ground layout. Use the internal reference if absolute accuracy is sufficient, but bypass it with a low-ESR capacitor placed as close to the REFIN pin as the layout allows. This page consolidates distributor pricing, pin-compatible MAX11040 family variants, and practical design notes that go beyond what is printed in the manufacturer datasheet.

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MAX11044BECB+T

MAX11044BECB+T - 16-Bit 4Ch 250ksps Simultaneous-Sampling ADC | Maxim

The Maxim Integrated MAX11044BECB+T is a high-performance, 4-channel, 16-bit simultaneous-sampling successive-approximation analog-to-digital converter (ADC) housed in a 64-pin TQFP-EP (10x10 mm) package with an exposed thermal pad. It operates from a single 5V analog supply and a 2.7V to 5.25V digital supply, achieves 250 ksps per channel throughput (1 Msps aggregate), and provides true bipolar ±5V or 0 to 5V input ranges with high-impedance (>1 MΩ) inputs. A successive-approximation register (SAR) ADC is a precision data converter that performs a binary search through an internal DAC and comparator network to digitize an analog input. SAR converters are valued for their deterministic latency, lack of pipeline delay, and excellent DC accuracy, placing them in the family of precision data converters alongside delta-sigma and pipeline ADCs within the broader signal chain semiconductor hierarchy. Key features include 4 true-differential input channels with simultaneous sampling, an internal 4.096V or external reference option, 84 dB SINAD and 87 dB SFDR at the 20 kHz input tone, ±1 LSB INL/DNL max, and a parallel digital interface. The integrated input protection accepts ±25V without damage, while the 4-channel true-differential architecture eliminates external instrumentation amplifiers in most three-phase power and vibration applications. The device uses a charge-redistribution DAC array with a built-in high-bandwidth track-and-hold on each channel, enabling capture of dynamic signals across all four channels without inter-channel skew. Internal calibration corrects for gain and offset errors, while the exposed thermal pad provides a low-θJA thermal path for high-temperature industrial environments. Typical applications include three-phase power-line monitoring, vibration analysis, multi-axis motor control, industrial process control, and simultaneous data acquisition systems. The bipolar ±5V input range makes the part especially useful in direct line-voltage sensing where signal conditioning stages can be eliminated. When designing with this device, place 10 µF and 0.1 µF decoupling capacitors close to each analog supply pin and tie the exposed pad to a solid analog ground plane to minimize digital-noise coupling to the analog front end. This page synthesizes distributor pricing, drop-in pin-compatible alternatives, and practical PCB design notes not found in the standalone Maxim datasheet, providing engineers with a one-stop reference for component selection, validation, and sourcing.

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MAX11044BETN+

MAX11044BETN+ - 16-Bit 4-Ch 250ksps Simultaneous-Sampling SAR ADC | Maxim Integrated

The Analog Devices (formerly Maxim Integrated) MAX11044BETN+ is a 4-channel, 16-bit, simultaneous-sampling analog-to-digital converter (ADC) housed in a 56-pin TQFN (8x8 mm) package. It integrates four independent track-and-hold (T/H) amplifiers and four SAR (successive-approximation-register) ADC cores that sample four input channels simultaneously at up to 250 ksps per channel. The device accepts true bipolar ±5V analog signals on each input, simplifying signal-chain interfacing to industrial ±5V sensors without external level shifting. A successive-approximation-register ADC is a precision data converter that converts an analog input voltage into a digital code using a binary-search algorithm with an internal precision DAC and comparator. Simultaneous-sampling ADCs (often called "sim-samp ADCs") are a specific sub-class in which every channel captures the input at the same instant via per-channel T/H stages, then performs the conversion sequentially. This makes them indispensable for multi-phase power, vibration, and motor-control systems where the phase relationship between channels carries critical information that a multiplexed ADC would smear across time. Key features include ±5V true bipolar input range, 250 ksps per channel simultaneous sampling, 16-bit resolution with no missing codes, a 2.7V-5.25V digital supply and 5V analog supply, an internal 4.096V reference, and per-channel ±20V input protection. The SAR architecture delivers deterministic latency and excellent DC accuracy, supporting demanding multi-channel measurement tasks. Typical applications include three-phase power-quality and power-monitoring systems, multi-axis motor control, vibration and modal analysis, industrial process control, and multi-channel data-acquisition (DAQ) front ends. The wide bipolar input range lets engineers connect directly to current-sensing shunts, position encoders, and bridge-pressure sensors without front-end signal conditioning. When designing with this device, provide clean low-impedance analog and digital supplies and use a solid ground plane under the TQFN exposed pad for thermal dissipation. The simultaneous-sampling architecture is the primary reason to choose this part over a generic multiplexed ADC - if phase coherence between channels matters, no multiplexing ADC will suffice. This page synthesizes distributor stock and pricing, drop-in alternatives in the same 56-TQFN footprint, and practical design notes that go beyond what the manufacturer datasheet alone provides.

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MAX11044BETN+T

MAX11044BETN+T - 16-Bit 4-Ch 250kSPS Simultaneous-Sampling ADC | Maxim

The Maxim Integrated MAX11044BETN+T is a 16-bit, 4-channel, simultaneous-sampling analog-to-digital converter (ADC) housed in a 56-pin TQFN (8 mm x 8 mm) exposed-pad package. Each of the four channels integrates a dedicated track-and-hold (T/H) amplifier and a successive-approximation register (SAR) core, achieving 250 ksps per channel and a 3 us conversion time. The device operates from a single 5 V analog supply, features high-impedance inputs to 1 G ohm, and accepts differential or single-ended analog signals with on-chip overrange protection. An ADC (Analog-to-Digital Converter) is a semiconductor device that converts continuous analog voltages into discrete digital codes for processing by microcontrollers, DSPs, or FPGAs. Successive-approximation register (SAR) ADCs use a binary-search algorithm through an internal DAC to converge on the input voltage in N clock cycles for N-bit resolution, providing an excellent balance of speed, accuracy, and power for multi-channel data-acquisition systems. Simultaneous-sampling ADCs add per-channel T/H stages so all channels are captured at the exact same instant — critical for phase-sensitive measurements such as three-phase power, vibration, and multi-axis motion control. Key features include a high-speed parallel digital interface, an internal 2.5 V reference (with optional external reference support), and per-channel overrange detection flags. The integrated T/H architecture eliminates inter-channel skew, while the high input impedance simplifies front-end signal conditioning. The 56-TQFN (8x8) exposed-pad package provides a low thermal resistance path, enabling reliable operation across the -40 C to +85 C industrial temperature range. The MAX11044B variant is the production-proven B-revision of the MAX11044 silicon — pin-compatible and software-compatible with the original. It shares a footprint with the 6-channel MAX11054 and 8-channel MAX11056, allowing scalable designs. The architecture delivers 84 dB SINAD and 100 dB SFDR typical at 250 ksps, suitable for precision instrumentation. Primary use cases include three-phase power monitoring, multi-axis motor control, vibration and acoustic analysis, and industrial data-acquisition front-ends where channel-to-channel phase accuracy is mandatory. The wide input common-mode range and high input impedance also simplify direct connection to current shunts and bridge sensors. When designing with this part, allocate sufficient PCB copper under the exposed pad (EP) for thermal dissipation — at least 1 square inch of inner/outer ground plane is recommended. Use 0.1 uF ceramic bypass capacitors within 3 mm of each supply pin and a 10 uF bulk capacitor on AVDD. For best SNR, route analog inputs as differential pairs away from digital switching lines. This page synthesizes distributor pricing, drop-in compatible alternatives, and practical design notes for the MAX11044BETN+T — engineering information not aggregated on any single distributor page.

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MAX11046BECB+T

MAX11046BECB+T - 8-Ch 16-Bit 250ksps Simultaneous-Sampling ADC | Analog Devices

The Analog Devices (formerly Maxim Integrated) MAX11046BECB+T is a 16-bit, 8-channel, simultaneous-sampling successive-approximation-register (SAR) analog-to-digital converter (ADC) with eight independent track-and-hold (T/H) front ends and an aggregate throughput of 250 ksps per channel, packaged in a 64-pin TQFP-EP (10x10 mm). The device accepts true bipolar ±5 V input signals at each channel and is one of the industry's first single-supply bipolar-input SAR ADCs. A successive-approximation-register ADC is a converter architecture that performs a binary search on the input voltage using an internal DAC and comparator, producing one conversion result per sample clock while dissipating very little power per conversion. SAR ADCs sit within the broader category of analog-to-digital converters (ADCs) -> data converters -> signal-chain ICs -> mixed-signal semiconductors. The MAX11046 family extends this architecture by replicating eight T/H + SAR cores on one die, enabling synchronized multi-phase measurements (three-phase power, multi-axis vibration, parallel sensor arrays) that cannot be served by a single-channel SAR ADC. Key features include ±5 V true bipolar inputs (high-impedance, > 1 Gohm), ±20 mA internal overrange clamps, internal 4.096 V bandgap reference (with optional external reference drive), 4 MHz T/H input bandwidth, internal or external conversion clock, and a 20 MHz bidirectional parallel interface for fast data throughput. Each channel delivers 250 ksps independent sampling, and oversampling can be cascaded across multiple devices for higher effective rates. The device operates from a single +5 V analog supply (AVDD) and a +2.7 V to +5.25 V digital supply (DVDD), with separate grounds (AGND/DGND) and the exposed pad (EP) tied to AGND for thermal dissipation. Integrated ±20 mA input clamps protect downstream converters from fault transients up to ±25 V at the input pins. The MAX11046 is specified over the -40 C to +85 C industrial temperature range and is offered in both 14-bit (MAX11044) and 16-bit (MAX11046) grades. Typical applications include three-phase power-line monitoring and protection relays, multi-axis vibration analysis, simultaneous-sampling industrial instrumentation, and any multi-channel data-acquisition system requiring tight channel-to-channel sampling alignment. The bipolar ±5 V input range allows direct connection to current-sense amplifiers and PT/CT-derived signals without external level shifting. When designing with this device, tie REFIN to AVSS through a 10 uF bypass cap if the internal reference is used, or drive REFIN with an external low-noise reference for best DC accuracy. Place the AGND/DGND star-ground connection directly under the EP for clean return paths, and use 0.1 uF + 10 uF decoupling on each supply pin. The 'T' suffix indicates Tape & Reel packaging per EIA-481. This page synthesizes distributor stock, drop-in pin-compatible alternatives, application circuit guidance, and design notes not collected in any single manufacturer datasheet.

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MAX11046ETN+TW

MAX11046ETN+TW - 16-Bit 8-Ch Simultaneous-Sampling 250ksps SAR ADC | Analog Devices

The Analog Devices (formerly Maxim Integrated) MAX11046ETN+TW is a 16-bit, 8-channel, simultaneous-sampling successive-approximation-register (SAR) analog-to-digital converter (ADC) in a 56-pin TQFN-EP (8 mm x 8 mm) package with tape-and-reel packaging. Each of the eight channels integrates an independent track-and-hold (T/H) amplifier and SAR core that delivers 250 ksps per channel, enabling true simultaneous acquisition across all inputs without inter-channel skew. The converter accepts bipolar input ranges up to ±5 V and provides a parallel digital interface. A successive-approximation-register ADC is a high-speed, deterministic data-acquisition building block within the broader data-converter category. SAR ADCs walk through internal capacitor-based reference ladders bit-by-bit per clock cycle, trading raw sampling rate for very low pipeline latency (typically one conversion cycle) and inherent anti-alias protection at the front-end sample-and-hold. This makes them preferred over delta-sigma ADCs when deterministic timing, fast multi-channel synchronization, or single-shot transient capture is required. The MAX11046ETN+TW extends this architecture with eight parallel T/H stages that sample simultaneously and hold while the shared ADC core sequences through conversions. Key features include ±5 V bipolar input range, 250 ksps per channel simultaneous sampling, 16-bit resolution with no missing codes, an internal 4.096 V reference (or optional external reference), and offset-binary digital output coding. The MAX11046ETN+TW supports operating temperatures from -40 C to +85 C and is supplied in a thermal-pad-equipped 56-pin TQFN-EP package that improves thermal dissipation in dense PCB designs. The exposed-pad layout requires soldering the thermal pad to a copper pour for rated electrical and thermal performance. Typical applications include three-phase power-line monitoring and motor control, multi-axis industrial process control, instrumentation, and any multi-channel data-acquisition system requiring deterministic, simultaneous sampling. The MAX11046 family is also widely used in power-quality analyzers and protective relay designs. The +TW suffix denotes the tape-and-reel packaging option for high-volume assembly. The MAX11046 EV kit PCB comes with a MAX11046ETN+ installed and can also evaluate the MAX11044, MAX11045, MAX11047, MAX11048, and MAX11049 family members. When designing with this device, ensure each analog input is properly buffered when source impedance is significant, and keep digital traces isolated from analog traces to minimize coupling. Decouple AVDD and DVDD with low-ESR ceramic capacitors placed close to the supply pins, and connect the exposed thermal pad to a substantial ground plane for optimal thermal performance. The MAX11046ETN+TW is fully RoHS compliant per the manufacturer product page. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the standalone manufacturer datasheet, providing actionable guidance for engineers selecting multi-channel simultaneous-sampling ADCs.

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MAX11054ECB+T

MAX11054ECB+T - 4-Ch 14-Bit Simultaneous-Sampling ADC | Maxim Integrated

The Maxim Integrated MAX11054ECB+T (now supplied under Analog Devices / Maxim Integrated) is a 4-channel, 14-bit, simultaneous-sampling successive-approximation-register (SAR) analog-to-digital converter in a 64-pin TQFP-EP (10x10 mm) package with an exposed thermal pad. Each of the four independent ADC cores delivers up to 200 ksps per channel while sharing the same start-of-conversion trigger, preserving phase relationships across all four inputs for polyphase power and vibration analysis. An SAR ADC (Successive-Approximation Register Analog-to-Digital Converter) is a class of data converter that uses a binary-search algorithm against an internal precision DAC to resolve each conversion in a fixed number of clock cycles. SAR converters are valued for deterministic latency, no-pipeline-delay sampling, and excellent DC accuracy, making them the preferred architecture for multi-channel data-acquisition front-ends, motor-control feedback loops, and three-phase power monitoring. The MAX11054 sits inside the broader data-converter / signal-chain hierarchy: ADC -> data converter -> mixed-signal IC -> semiconductor. Key features include true simultaneous sampling on four channels from a single CONVST pulse, a 200 ksps per-channel throughput, ±5V bipolar input range (software configurable for ±5V, ±10V, 0-5V, 0-10V), an internal 4.096V precision reference, and a high-speed parallel interface compatible with 3V/5V DSP and microcontroller buses. The 64-TQFP-EP package exposes a thermal pad for low-impedance ground return, critical for the part's specified -40C to +85C industrial operating range and for managing digital-edge current spikes during back-to-back sample intervals. Typical applications include three-phase power-line monitoring, motor control, vibration and acoustic analysis, instrumentation, and multi-axis sensor signal acquisition. Designers select the MAX11054 when channel-to-channel phase coherence matters more than raw single-channel speed; for single-channel applications requiring more than 1 Msps, a pipelined ADC would be more appropriate. Place a 10uF plus 0.1uF decoupling pair adjacent to AVDD and AVSS pins, and route the analog inputs with symmetrical guard traces to preserve channel-to-channel matching. This page consolidates distributor pricing, drop-in alternatives, and practical layout guidance that complement the manufacturer datasheet.

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MAX11055ECB+

MAX11055ECB+ - 6-Ch 14-Bit 250ksps Simultaneous-Sampling ADC | Maxim

The Maxim Integrated (Analog Devices) MAX11055ECB+ is a 6-channel, 14-bit, simultaneous-sampling successive-approximation-register (SAR) analog-to-digital converter (ADC) housed in a 64-pin TQFP (ECB) package. Each of the six channels integrates its own track-and-hold (T/H) front-end and SAR core, enabling true simultaneous sampling at 250 ksps per channel with a single parallel data interface. The part accepts single-ended analog inputs and operates from a +4.75V to +5.25V analog supply and a +2.7V to +5.25V digital supply. A simultaneous-sampling ADC is a converter in which every input channel is captured at exactly the same instant, then digitized by independent SAR cores. This architecture removes the channel-to-channel sampling skew that plagues multiplexed ADCs and is essential when measuring multi-phase currents, three-phase voltages, or vibration/phase-sensitive signals. Within the broader product hierarchy, the MAX11055ECB+ sits under ADC -> data converter -> signal chain IC -> semiconductor, and is part of the broader family of Maxim 4-/6-/8-channel 14-/16-bit simultaneous-sampling ADCs (MAX11044/45/46 16-bit and MAX11054/55/56 14-bit). Key specifications include 14-bit resolution, 250 ksps per-channel throughput, six independent T/H + SAR pairs, a parallel word-access data interface, an internal +2.5V or external reference option, and ±1 LSB INL (typ). The BiCMOS process delivers low analog input current and supports input bandwidths beyond the Nyquist limit for accurate multi-tone power-line and motor-control acquisitions. The 64-pin TQFP-EP package provides a low thermal-resistance path and a generous analog/digital ground split for mixed-signal layout discipline. Typical applications include three-phase power-line monitoring, motor control, multi-axis vibration analysis, sonar beam-forming front ends, and instrumentation requiring phase-coherent multi-channel acquisition. When designing with this part, keep analog and digital ground returns physically separated and join them only at the AGND-to-DGND single-point tie beneath the exposed pad to preserve the part's excellent channel-to-channel isolation.

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MAX11058ECB+T

MAX11058ECB+T - 14-Bit, 6-Ch, 250kSPS Simultaneous-Sampling ADC | Maxim

The Maxim Integrated (now Analog Devices) MAX11058ECB+T is a 14-bit, 6-channel, simultaneous-sampling successive-approximation-register (SAR) analog-to-digital converter (ADC) with 250 kSPS per-channel throughput, packaged in a 64-pin TQFP with exposed thermal pad (10x10 mm). It accepts six independent single-ended analog inputs and provides six dedicated digital conversion results through a parallel interface, all sampled on the same clock edge for true simultaneous acquisition across channels. A SAR ADC (Successive Approximation Register Analog-to-Digital Converter) is a category of data converter that resolves a binary output one bit at a time using an internal comparator and a precision DAC. SAR ADCs occupy a middle position in the data-converter hierarchy (SAR ADC -> ADC -> data converter -> signal chain IC -> semiconductor), offering a favorable balance of speed, resolution, and latency compared to delta-sigma and pipeline architectures. Simultaneous-sampling SAR ADCs are widely used in multi-phase power, vibration, and instrumentation systems where the phase relationship between channels must be preserved. Key features include ±5V bipolar input range (per the MAX11057/58/59 family), single +5V analog supply operation, internal or external reference, low aperture delay, and per-channel ±10 V overvoltage protection. The internal reference option simplifies bill-of-materials, while an external reference mode allows users to tighten absolute accuracy for calibration-critical applications. Throughput of 250 kSPS per channel enables per-channel sampling of signals well above the audio band, supporting industrial control loops and motor-control current sensing. The wide operating temperature range of -40 °C to +85 °C supports industrial and instrumentation deployments. Typical applications include three-phase power-line monitoring, multi-axis vibration analysis, multi-channel data acquisition modules, motor control current sensing, sonar and phased-array beamforming front ends, and industrial process-control front ends. Parallel interface simplifies connection to FPGAs, CPLDs, and microcontrollers with external memory buses. When designing with this ADC, ensure the external antialiasing RC network matches the 250 kSPS throughput to avoid aliasing high-frequency noise; combined with proper ground-referenced layout of the six analog inputs this preserves the channel-to-channel phase alignment that defines the part's value proposition. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.

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MAX1109CUB+G07

MAX1109CUB+G07 - 8-Bit 2-Ch Serial ADC | Maxim Integrated

The Maxim Integrated MAX1109CUB+G07 is a single-supply, low-power, 2-channel, serial 8-bit analog-to-digital converter (ADC) housed in a 10-pin µMAX (uSOP) package. It features a successive-approximation register (SAR) architecture, an internal reference, and an SPI/QSPI/MICROWIRE-compatible serial interface delivering throughput rates up to 10 µs per conversion. The part is rated for operation from 2.7 V to 5.5 V supply and is optimized for power-sensitive applications. An SAR ADC is a type of analog-to-digital converter that uses a successive-approximation register and an internal DAC to binary-search the input voltage against a reference, producing one bit per clock cycle with deterministic latency. SAR ADCs are valued in precision instrumentation for their low power, small footprint, no-pipeline delay, and excellent DC accuracy. The MAX1109 belongs to the data-converter hierarchy: ADC -> SAR ADC -> 8-bit ADC -> low-power serial ADC -> data acquisition IC -> semiconductor IC. Key features include ±1 LSB (max) integral nonlinearity, a track-and-hold input stage capable of handling single-ended or pseudo-differential signals, an internal 2.5 V reference, and a hardware shutdown mode that drops supply current to under 10 µA. The 10-pin µMAX package occupies only 20% of the PCB area of an 8-pin DIP, making it well suited to compact, handheld instruments. Typical applications include 4 mA to 20 mA loop-powered remote systems, handheld measurement devices, medical instruments, portable data loggers, receive-signal-strength indicators (RSSI), solar-powered remote sensors, and system-diagnostics boards. The combination of low power and a small package enables battery-powered designs where every milliwatt and square millimeter matter. When designing with this part, place the 0.1 µF supply-decoupling capacitor within 5 mm of the VDD pin and keep analog input traces short and guarded to preserve the 8-bit noise-free resolution. The internal reference is adequate for most precision applications, but a quiet external reference may be substituted via the REF pin for the highest-accuracy measurements. This page synthesizes distributor pricing, verified drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone - giving engineers a single reference for sourcing, replacement, and design-in decisions for the MAX1109.

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MAX110BCPE

MAX110BCPE - 14-Bit Serial ADC, 2-Ch, ±5V, 16-PDIP | Maxim

The Maxim MAX110BCPE is a 14-bit, 2-channel, ±14-bit serial output analog-to-digital converter (ADC) housed in a 16-pin PDIP through-hole package, supplied in tube packaging. The converter uses an internal auto-calibration technique to achieve 14-bit resolution plus overrange without external components, and operates from ±5V analog and digital supplies. The part is targeted at cost-sensitive precision measurement designs that need a serial interface and small PCB footprint. Operating supply current is 550 µA and drops to 4 µA in power-down mode, enabling battery-friendly sampling. An analog-to-digital converter (ADC) is a mixed-signal integrated circuit that converts a continuous analog input voltage into a discrete digital code representing the input's magnitude. Sigma-delta (Σ-Δ) ADCs like the MAX110 achieve high resolution and excellent noise immunity by oversampling the input at many times the Nyquist rate and shaping quantization noise out of the signal band; the MAX110 family adds on-chip auto-calibration to compensate offset and gain drift without requiring external trims. Within the broader taxonomy, the MAX110 sits in the data-converter sub-class of mixed-signal ICs, which itself belongs to the signal-conditioning and data-acquisition hierarchy used in industrial, instrumentation, and sensor-interface designs. Key features of the MAX110BCPE include 2 differential input channels, a 50 SPS (samples-per-second) maximum throughput rate, an SPI/QSPI/MICROWIRE-compatible serial interface, and a true differential analog input topology. Internal digital calibration eliminates gain and offset errors at the conversion cycle, and a hardware shutdown pin reduces idle current to 4 µA, ideal for power-constrained portable instrumentation. The MAX110 uses a switched-capacitor sigma-delta modulator front-end followed by a digital decimation filter, producing 14-bit effective resolution without requiring an external reference or precision components. This architecture favors low-frequency, high-accuracy applications over wideband audio or video digitizing, since the modulator samples at a high internal rate and the digital filter limits useful bandwidth. Typical applications for the MAX110BCPE include weighing scales and load-cell readouts, panel meters and digital voltmeters, process-control analog front ends, temperature-pressure measurement via bridge sensors, portable battery-powered data loggers, and isolated sensor interfaces in industrial 4 mA to 20 mA loops. The combination of differential inputs, internal calibration, and serial output suits it well to systems that already include a microcontroller with an available SPI port. When designing with the MAX110BCPE, ensure low-impedance analog ground return paths because the switched-capacitor input architecture draws brief transient currents on the input pins. Place 0.1 µF bypass capacitors as close as possible to the ±5V supply pins and the REF pin, and route the analog and digital grounds back to a single star point beneath the device to minimize conversion noise.

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MAX110BCWE+TG002

MAX110BCWE+TG002 - 14-Bit Sigma-Delta Serial ADC | Maxim

The Maxim Integrated MAX110BCWE+TG002 (now under Analog Devices) is a low-cost, 2-channel, ±14-bit serial-output sigma-delta analog-to-digital converter in a 16-pin wide-body SOIC (WSOIC/W-SOIC) package, supplied on tape-and-reel as a TG002 packaging variant of the MAX110BCWE+ die. It accepts differential analog inputs in the ±3 V range (with common-mode support for 0 V to ±5 V) and converts them using an on-chip auto-calibration technique, achieving true 14-bit resolution plus overrange without external components. A fast serial interface is compatible with SPI, QSPI, and MICROWIRE, simplifying opto-isolation and freeing microcontroller pins. A sigma-delta ADC is a type of oversampling converter that trades raw conversion speed for very high resolution and excellent noise rejection by pushing quantization noise out of band. In the system hierarchy, the MAX110 sits between general-purpose successive-approximation ADCs (SAR) and dedicated high-precision 24-bit converters - well suited to industrial weighing, panel meters, and portable instrumentation where 50 SPS and 14-bit accuracy are sufficient but true differential input is required. Key features include ±14-bit resolution with no missing codes, internal digital filtering, an on-chip 4.096 V reference (or optional external reference input), ±5 V analog supply operation, and a low 4 mW typical power dissipation. The serial interface reduces board-routing complexity versus a parallel ADC and enables direct connection to opto-isolated digital isolators in industrial systems. The device uses a 2nd-order sigma-delta modulator followed by an internal SINC4 digital filter, delivering 50 SPS at the default clock. Compared with a SAR ADC of similar cost, the MAX110 is significantly slower but offers true differential input, integrated clock, and superior 50 Hz / 60 Hz mains noise rejection - a useful property for transducer-front-end designs in electrically noisy factory environments. Typical applications include industrial weighing scales and load-cell signal chains, portable data loggers and field instruments, temperature-pressure bridge transducers with excitation, panel meters, and battery-powered sensor monitoring. The ±5 V supply also makes it attractive for legacy process-control designs originally built around ±5 V only signal paths. When designing with this device, pay attention to the input-common-mode voltage window and add an input anti-alias RC network ahead of the analog inputs. The TG002 suffix on this variant is a packaging/reel code (tape-and-reel, 2 kpc reel orientation) and the die is identical to the MAX110BCWE+; drop-in PCB layout is preserved across MAX110ACWE+, MAX110BCWE+, and the MAX110BEWE+ grade siblings. This page synthesizes distributor pricing, exact drop-in alternatives, and practical design notes for engineers replacing or sourcing the MAX110BCWE+TG002 reel code.

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MAX110BCWE+TG002 - 14-Bit Sigma-Delta Serial ADC | Maxim