10M08DCV81I7G vs 10M02DCV36C7G Comparação
Comparação detalhada lado a lado de 10M08DCV81I7G por Altera e 10M02DCV36C7G por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | 10M08DCV81I7G | 10M02DCV36C7G |
|---|---|---|
| Marca | Altera | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $26,85 | $2,34 |
| Product Family | MAX 10 | — |
| Logic Elements (LE) | 8000 | — |
| Embedded User Flash | 387072 bit (378 Kbit) | — |
| Maximum User I/Os | 56 | — |
| Package Type | 81-ball WLCSP (UFBGA, wafer-level chip-scale package) | — |
| Process Node | [DATA_NEEDED: process node] | — |
| Configuration Memory | On-chip dual-configuration flash, instant-on | — |
| Embedded ADC | 12-bit SAR ADC (1 Msps) [DATA_NEEDED: number of channels] | — |
| Temperatura de operação | Industrial -40C to +100C (I7 grade) | — |
| Supply Voltage Core | [DATA_NEEDED: VCC core voltage] | — |
| I/O Bank Count | [DATA_NEEDED: number of I/O banks] | — |
| I/O Standards Supported | LVCMOS, LVTTL, LVDS, SSTL, RSDS | — |
| Memory Interfaces | DDR3, DDR3L, LPDDR2 (external PHY required) | — |
| PLL Count | [DATA_NEEDED: number of PLLs] | — |
| Global Clock Networks | [DATA_NEEDED: clock network count] | — |
| Configuration Modes | JTAG, Active Serial (AS), Passive Serial (PS) | — |
| Tipo de montagem | Surface Mount (WLCSP - requires underfill) | Surface Mount |
| Nível MSL | [DATA_NEEDED: MSL rating] | — |
| Status RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Design Software | Intel Quartus Prime (MAX 10 device support) | — |
| Device Type | — | Non-volatile field-programmable gate array |
| Series | — | MAX 10 |
| Logic Elements | — | 2,000 |
| I/O Pins | — | 27 |
| Embedded Memory | — | 110,592 bits |
| Operating Voltage | — | 1.2 V |
| Process Technology | — | 55 nm |
| Encapsulamento | — | 36-WFBGA, WLCSP |
| FPGA Configuration | — | Non-volatile |
| Logic Architecture | — | Field-programmable gate array |
| Product Category | — | Embedded FPGA |
| Package Pin Count | — | 36 balls |
| Faixa de temperatura de operação | — | [DATA_NEEDED: operating temperature range] |