2ED21064S06JXUMA1 vs 2ED21844S06JXUMA1 Comparação
Comparação detalhada lado a lado de 2ED21064S06JXUMA1 por Infineon e 2ED21844S06JXUMA1 por Infineon. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | 2ED21064S06JXUMA1 | 2ED21844S06JXUMA1 |
|---|---|---|
| Marca | Infineon | Infineon |
| Categoria | Power MOSFET Drivers | Power MOSFET Drivers |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $0,85 | $1,68 |
| Função | High-Side and Low-Side Gate Driver | — |
| Configuration | Half-Bridge (2 outputs, non-inverting) | — |
| Topologia | High-Side, Low-Side with integrated bootstrap diode | — |
| Maximum Offset / Boot Voltage | 650 V | — |
| Supply Voltage (VCC) | 10 V to 20 V | 10 V to 20 V [DATA_NEEDED: exact range] |
| Source Current (typical) | 0.29 A | — |
| Sink Current (typical) | 0.7 A | — |
| Rise Time (typical) | [DATA_NEEDED: rise time] | — |
| Fall Time (typical) | [DATA_NEEDED: fall time] | — |
| Propagation Delay (typical) | 100 ns | — |
| Channel-to-Channel Delay Match | [DATA_NEEDED: channel-to-channel delay match] | — |
| Under-Voltage Lockout | Yes (both channels) | — |
| Bootstrap Diode | Integrated | Integrated |
| Input Logic Compatibility | 3.3 V / 5 V CMOS | TTL/CMOS 3.3 V and 5 V |
| Temperatura de operação | -40C to +125C | — |
| Encapsulamento | PG-DSO-14 (14-pin SOIC) | PG-DSO-14-49 (DSO-14) |
| Tipo de montagem | Surface Mount | Surface Mount |
| Nível MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| Status RoHS | ROHS3 Compliant | Compliant |
| Negative Gate Drive Robustness | -0.7 V | — |
| Driver Configuration | — | Half-Bridge |
| Number of Drivers | — | 2 (high-side + low-side) |
| Input Type | — | Non-Inverting |
| Blocking Voltage (Voffset) | — | 650 V |
| Output Current (Source/Sink) | — | 2.5 A typical |
| Propagation Delay (Typ.) | — | 200 ns [DATA_NEEDED: matching value] |
| Undervoltage Lockout (UVLO) | — | Yes, both HS and LS rails |
| Shutdown Pin | — | Yes |
| Negative VS Transient Immunity | — | -100 V typical |
| Faixa de temperatura de operação | — | -40 C to +125 C |