5CSEBA4U19A7N vs 5CSEBA2U23A7N Comparação
Comparação detalhada lado a lado de 5CSEBA4U19A7N por Intel e 5CSEBA2U23A7N por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | 5CSEBA4U19A7N | 5CSEBA2U23A7N |
|---|---|---|
| Marca | Intel | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $99,90 | $99,50 |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Logic Elements | 40 K | 25,000 LE |
| Adaptive Logic Modules | [DATA_NEEDED: ALM count] | — |
| Embedded Memory | 3.4 Mbits (M9K) | M10K blocks (count [DATA_NEEDED: exact M10K/M20K count]) |
| DSP Blocks (18x18 Multipliers) | 224 | — |
| PLLs | [DATA_NEEDED: PLL count] | Fractional PLLs (count [DATA_NEEDED: exact PLL count]) |
| HPS Maximum Application Clock | 925 MHz | — |
| Memory Interfaces | DDR3, DDR3L, LPDDR2 (via HPS); soft DDR3/2 in FPGA | — |
| User I/O | 161 | 188 |
| Encapsulamento | 484-UBGA (U19), 19x19 mm, 1.0 mm pitch | 672-UBGA (23x23 mm) |
| Tipo de montagem | Surface Mount (BGA) | Surface Mount (BGA) |
| Temperatura de junção de operação | -40C to +125C (automotive) / -40C to +100C (industrial) | — |
| Process Node | TSMC 28 nm low-power | — |
| Core Voltage | 1.1 V (typical) | — |
| Status RoHS | Compliant | Compliant (per ampheo listing) |
| Nível MSL | 3 (168 hours) | [DATA_NEEDED: MSL level] |
| MPN Code | — | 5CSEBA2U23A7N (Cyclone V SE A2, U23 package) |
| Hard Processor System (HPS) | — | Dual-core ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 700 MHz |
| Process Technology | — | 28 nm low-power |
| Speed Grade | — | 7 |
| Temperature Grade | — | A (Commercial, 0C to +85C) [DATA_NEEDED: exact junction range] |
| Operating Voltage (Core) | — | 1.1 V (typical FPGA core, multi-rail HPS) |
| Configuration Scheme | — | HPS-boot of FPGA fabric via configuration QSPI |
| DSP Blocks | — | Variable-precision DSP (count [DATA_NEEDED: exact count]) |