5CSXFC4C6U23I7LN vs 5CSXFC5C6U23I7LN Comparação
Comparação detalhada lado a lado de 5CSXFC4C6U23I7LN por Altera e 5CSXFC5C6U23I7LN por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Altera
5CSXFC4C6U23I7LN - Cyclone V SX SoC FPGA 40K LE Dual ARM Cortex-A9 925MHz 672-UBGA | Altera
5CSXFC4C6U23I7LN ✓ AtivoIntel
5CSXFC5C6U23I7LN - Cyclone V SX SoC FPGA, 85K LE, ARM Cortex-A9 | Intel
5CSXFC5C6U23I7LN ✓ AtivoComparação de especificações
| Parâmetro | 5CSXFC4C6U23I7LN | 5CSXFC5C6U23I7LN |
|---|---|---|
| Marca | Altera | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $312,40 | $285,60 |
| Family | Cyclone V SX SoC FPGA | — |
| Device Variant | 5CSXFC4 (U23 package code) | — |
| Logic Elements | 40,000 | 85 K |
| Processor Cores | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum Processor Clock | 925 MHz | — |
| Process Technology | 28 nm low-power | — |
| Encapsulamento | 672-ball UBGA (23x23 mm) | 672-UBGA (23x23 mm) |
| Temperatura de operação | -40C to +100C (Industrial) | -40C to +100C (industrial, I7) |
| Speed Grade | I7 | — |
| Embedded Memory | [DATA_NEEDED: total block RAM bits] | 4,450 Kbits |
| DSP Blocks | [DATA_NEEDED: variable-precision DSP count] | 224 (18x19 variable-precision multipliers) |
| Transceivers | Integrated high-speed transceivers (PCIe Gen2 capable) | 6 channels, up to 3.125 Gbps |
| User I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Tipo de montagem | Surface Mount (BGA) | — |
| Status RoHS | Compliant | Compliant (LN suffix) |
| Lead-Free | Yes | — |
| Nível MSL | [DATA_NEEDED: moisture sensitivity level] | — |
| Series | — | Cyclone V SX |
| Device Type | — | SoC FPGA (FPGA + ARM Cortex-A9 HPS) |
| Hard Processor System | — | Dual-core ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 925 MHz |
| Maximum User I/O | — | 364 (excluding HPS-dedicated pins) |
| Hard Memory Controllers | — | 2 |
| Memory Interface Support | — | DDR3, DDR3L, LPDDR2 |
| Process Node | — | TSMC 28 nm low-power |
| Configuration | — | Serial (AS) or Parallel (FPP) flash, bitstream encryption supported |