5CSXFC6C6U23A7N vs 5CSXFC5C6U23A7N Comparação
Comparação detalhada lado a lado de 5CSXFC6C6U23A7N por Intel e 5CSXFC5C6U23A7N por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Intel
5CSXFC5C6U23A7N - Cyclone V SX SoC FPGA, 85K LE, ARM Cortex-A9 | Intel
5CSXFC5C6U23A7N ✓ AtivoComparação de especificações
| Parâmetro | 5CSXFC6C6U23A7N | 5CSXFC5C6U23A7N |
|---|---|---|
| Marca | Intel | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $328,75 | $64,40 |
| Family | Cyclone V SX SoC FPGA | Cyclone V SX SoC FPGA |
| Logic Elements | 110,000 | 85K |
| Processor Subsystem | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Embedded Memory (M20K) | 5,140 Kbit | — |
| DSP Blocks (18x18) | 224 | — |
| Maximum User I/O | 364 LVDS-capable pins | 145 (FPGA fabric I/O) |
| Transceivers | 6 (up to 3.125 Gbps) | 6 (up to 3.125 Gbps) |
| Encapsulamento | 672-pin UBGAFBGA (23 x 23 mm) | 672-UBGA / UBGFA (23x23 mm) |
| Process Technology | TSMC 28 nm Low Power | TSMC 28 nm low-power |
| Core Voltage | 1.1 V | 1.1 V |
| Hard Memory Controller | DDR2 / DDR3 / LPDDR2 with ECC | — |
| HPS Clock Frequency | Up to 925 MHz (per Cyclone V device datasheet) | — |
| Temperatura de operação | Automotive grade (per part number decode A) | — |
| Tipo de montagem | Surface Mount (BGA) | Surface Mount (BGA) |
| Status RoHS | Compliant (per Intel product page) | Compliant |
| Nível MSL | [DATA_NEEDED: moisture sensitivity level] | — |
| Hard Processor Subsystem (HPS) | — | Dual-core ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 700 MHz |
| Embedded Memory | — | 4,450 Kbits |
| DSP Blocks | — | 87 (variable-precision) |
| Contagem de pinos | — | 672 |
| Operating Temperature (Automotive Grade) | — | -40C to +125C (junction) |
| Memory Interfaces | — | DDR3, DDR2, LPDDR2 (via HPS) |
| Configuration | — | Serial (AS x4) and JTAG |