AD7715ACHIPS-5 vs AD7715ACHIPS-3 Comparação
Comparação detalhada lado a lado de AD7715ACHIPS-5 por Analog Devices e AD7715ACHIPS-3 por Analog Devices. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Analog Devices
AD7715ACHIPS-5 - 16-Bit Sigma-Delta ADC, 3V/5V, 450uA | Analog Devices
AD7715ACHIPS-5 NrndComparação de especificações
| Parâmetro | AD7715ACHIPS-5 | AD7715ACHIPS-3 |
|---|---|---|
| Marca | Analog Devices | Analog Devices |
| Categoria | ADC/DAC | ADC/DAC |
| Status do ciclo de vida | NRND | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $14,95 | $11,25 |
| Architecture | 16-bit sigma-delta ADC | — |
| Resolução | 16 bits, no missing codes | 16 bits |
| Number of Input Channels | 1 differential / pseudo-differential | — |
| Tensão de alimentação | 3 V or 5 V nominal | 3 V nominal (3 V variant; -5 variant operates at 5 V) |
| Total Supply Current | 450 uA typical at 3 V supply | — |
| Master Clock Frequency | Up to 5 MHz at 5 V, up to 2.4576 MHz at 3 V | — |
| On-chip PGA | Yes, programmable gain (1 to 128) | — |
| Input Range | 20 mV to 2.5 V (gain-dependent, 5 V supply) | — |
| Output Data Rate | Programmable via digital filter first-notch (typ. 10 Hz to 1 kHz) | — |
| Calibration | Self-calibration and system-calibration modes | On-chip self-calibration (zero-scale, full-scale) |
| Serial Interface | SPI, QSPI, MICROWIRE, DSP-compatible 3-wire serial | 3-wire SPI/QSPI/MICROWIRE compatible |
| Encapsulamento | Bare die (CHIPS) | — |
| Temperatura de operação | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| Status RoHS | Compliant (per Analog Devices product page) | [DATA_NEEDED: RoHS status for die form] |
| Lead-Free | Yes (bare-die construction - consult factory) | — |
| Number of Inputs | — | 1 differential |
| ADC Architecture | — | Sigma-Delta (charge balancing) |
| Corrente de alimentação | — | 450 uA max at 3 V / 1 MHz MCLK |
| Master Clock Range | — | 1 MHz typical (see datasheet) |
| Integral Nonlinearity (INL) | — | 0.0015% |
| Missing Codes | — | None (16 bits guaranteed) |
| Programmable Gains | — | 1, 2, 32, 128 |
| Input Type | — | Differential analog input pair |
| Package Type | — | Bare die / CHIPS |
| Terminal Count | — | 16 (die pads) |