ADC1415S065HN-C18 vs ADC1112D125HN-C18 Comparação
Comparação detalhada lado a lado de ADC1415S065HN-C18 por Renesas Electronics e ADC1112D125HN-C18 por Renesas Electronics. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Renesas Electronics
ADC1415S065HN-C18 - 14-bit 65 MSPS ADC, LVDS/CMOS Output | Renesas
ADC1415S065HN-C18 ✓ AtivoRenesas Electronics
ADC1112D125HN-C18 - Dual 11-bit 125MSPS ADC, LVDS/CMOS | Renesas
ADC1112D125HN-C18 ✓ AtivoComparação de especificações
| Parâmetro | ADC1415S065HN-C18 | ADC1112D125HN-C18 |
|---|---|---|
| Marca | Renesas Electronics | Renesas Electronics |
| Categoria | ADC/DAC | ADC/DAC |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $14,25 | $9,48 |
| Resolução | 14 bit | 11-bit |
| Number of Channels | 1 | 2 (dual, simultaneous sampling) |
| Taxa de amostragem | 65 MSPS | — |
| Architecture | Pipelined | — |
| Input Type | Single-ended, buffered | Single-ended analog inputs (per channel) |
| Data Interface | CMOS, LVDS, LVDS DDR | — |
| Configuration Port | Serial SPI | — |
| Encapsulamento | 40-pin HVQFN Exposed Pad (HVQFN-40) | HVQFN-64 (8x8 mm with exposed thermal pad) |
| Tipo de montagem | Surface Mount | Surface Mount |
| Faixa de temperatura de operação | -40C to +85C | -40 C to +85 C |
| Supply Voltage - Analog (AVDD) | 3.3 V (typ) | — |
| Supply Voltage - Digital (DVDD) | 1.8 V to 3.3 V (typ) | — |
| Input Bandwidth | [DATA_NEEDED: input bandwidth] | — |
| SNR | [DATA_NEEDED: SNR dBFS] | — |
| SFDR | [DATA_NEEDED: SFDR dBc] | — |
| INL (max) | [DATA_NEEDED: INL LSB] | — |
| DNL (max) | [DATA_NEEDED: DNL LSB] | — |
| Power Dissipation | [DATA_NEEDED: power dissipation mW] | — |
| Status RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Nível MSL | [DATA_NEEDED: MSL level] | 3 (168 hours) |
| Family | ADC1415S (65/80/105/125 MSPS variants) | — |
| Sample Rate (Max) | — | 125 Msps |
| Analog Supply Voltage (AVDD) | — | 3.0 V to 3.6 V |
| Digital I/O Supply (OVDD) | — | 1.8 V to 3.3 V |
| Output Interface | — | CMOS or LVDS DDR (selectable) |
| Reference | — | Internal programmable (0-6 dB in 1 dB steps) or external |
| Control Interface | — | SPI (3-wire, mode configuration) |
| Power-Down Mode | — | Yes, per-channel via SPI |