EP1830-20CFN vs EP1810LC-35 Comparação
Comparação detalhada lado a lado de EP1830-20CFN por Texas Instruments e EP1810LC-35 por Rochester Electronics. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Rochester Electronics
EP1810LC-35 - 48-Macrocell Classic EPLD, 35ns, PLCC-68 | Rochester/Altera
EP1810LC-35 ⚠ Última compraComparação de especificações
| Parâmetro | EP1830-20CFN | EP1810LC-35 |
|---|---|---|
| Marca | Texas Instruments | Rochester Electronics |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Última compra |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $9,85 | $49,20 |
| Device Type | Erasable Programmable Logic Device (EPLD) | EPLD (Erasable Programmable Logic Device) |
| Technology | CMOS EPROM | CMOS, UV-erasable EPROM |
| Macrocell Count | 48 | — |
| Propagation Delay (tPD) | 22 ns | — |
| Maximum Supply Voltage | 5.25 V | — |
| I/O Pins | 48 | [DATA_NEEDED: I/O count exact] |
| Dedicated Inputs | 12 | — |
| Encapsulamento | PLCC-68 (QCCJ, J-lead) | 68-pin PLCC (J-Lead) |
| Terminal Pitch | 1.27 mm | — |
| Terminal Form | J-Bend | — |
| Package Code | QCCJ | — |
| Package Shape | Square | — |
| Operating Temperature Grade | Commercial (0C to 70C) | — |
| Typical Operating Current | 20 mA at 1 MHz | — |
| Maximum Counter Frequency | 50 MHz (4 x 12-bit counters) | — |
| Speed Grade | -20 | — |
| Configuration Memory | Non-volatile EPROM (UV-erasable) | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED] |
| Series | — | Classic EP1810 |
| Macrocells | — | 48 |
| Equivalent Gates | — | 900 usable / 2100 equivalent |
| Maximum Operating Frequency | — | 28.6 MHz |
| Propagation Delay (tpd) | — | 35 ns (max, '-35' speed grade) |
| Supply Voltage (VCC) | — | 5 V (4.75 V to 5.25 V) |
| Tipo de montagem | — | Surface Mount (socketable) |
| Temperatura de operação | — | 0C to +70C (commercial) |
| Configuration Method | — | UV-erase + EPROM programmer |
| Programmable Interconnect | — | Centralized Programmable Interconnect Array (PIA) |
| Development Tool (legacy) | — | MAX+PLUS II / A+PLUS |
| Lead-Free | — | [DATA_NEEDED] |