EP1S25F672C5N vs EP1SGX10DF672C5N Comparação
Comparação detalhada lado a lado de EP1S25F672C5N por Intel e EP1SGX10DF672C5N por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Intel
EP1SGX10DF672C5N - Stratix GX FPGA, 10,570 Cells, 672-BGA | Intel
EP1SGX10DF672C5N ⚠ Última compraComparação de especificações
| Parâmetro | EP1S25F672C5N | EP1SGX10DF672C5N |
|---|---|---|
| Marca | Intel | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Última compra |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $142,00 | $192,00 |
| Family | Stratix | Stratix GX |
| Series | EP1S25 | — |
| Logic Elements (Cells) | 25,660 | — |
| Number of CLBs | 2,566 | — |
| Number of Logic Cells / Gates | [DATA_NEEDED: total system gates] | — |
| Process Technology | 130 nm CMOS | — |
| Maximum Internal Frequency | 500 MHz | — |
| Core Supply Voltage | 1.5 V (nominal) | — |
| Number of I/O Pins | 473 user I/O | — |
| Number of I/O Banks | [DATA_NEEDED: I/O bank count] | — |
| Package Type | FineLine BGA (FBGA) | — |
| Package Pin Count | 672 | — |
| Ball Pitch | 1.00 mm | — |
| Faixa de temperatura de operação | 0 °C to +85 °C (commercial) | — |
| Speed Grade | C5 | — |
| Lead-Free (Pb-Free) | Yes (suffix "N") | — |
| Configuration Method | SRAM-based, programmable via JTAG / Passive Serial / Fast Passive Parallel | — |
| Tipo de montagem | Surface Mount (BGA) | Surface Mount (Flip-Chip BGA) |
| Status RoHS | Compliant | Compliant (FBGA package) |
| Logic Cells | — | 10,570 |
| Logic Array Blocks (LABs) | — | 1,057 |
| Configurable Logic Blocks | — | 1,200 |
| User I/Os | — | 362 |
| On-chip RAM | — | 920,448 bits |
| Supply Voltage (Core, VCCINT) | — | 1.5 V nominal (1.425 V to 1.575 V) |
| Technology | — | 130 nm CMOS |
| Temperatura de operação | — | 0 C to 85 C (Commercial) |
| Encapsulamento | — | 672-ball FC-FBGA (FineLine BGA), 33 x 33 mm, 1.0 mm pitch |
| Logic Family | — | CMOS |
| Configuration | — | Passive Serial / Passive Parallel / JTAG / Altera Serial |
| High-Speed Transceivers | — | Embedded GX transceivers (data rate not specified in provided data [DATA_NEEDED: transceiver count and max data rate]) |