EP20K30EFC144-1N vs EP20K100EFC144-1 Comparação
Comparação detalhada lado a lado de EP20K30EFC144-1N por Intel e EP20K100EFC144-1 por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EP20K30EFC144-1N | EP20K100EFC144-1 |
|---|---|---|
| Marca | Intel | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | NRND |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $125,00 | $61,75 |
| Series | APEX-20KE | — |
| Device Family | APEX-20K MultiCore (LUT + Product-Term + ESB) | APEX 20KE |
| Gates | 30,000 | — |
| Logic Elements | 1,200 | 4,160 |
| Embedded SRAM Bits | 24,576 | — |
| User I/Os | 93 (per Mouser/Kynix listing); 408 (per alternate datasheet listing - see note) | 93 |
| Package Type | 144-pin FineLine BGA (FBGA) | 144-ball FBGA (13x13 mm, 1.0 mm pitch) |
| Internal Frequency (max) | 160 MHz | — |
| Propagation Delay | 1.68 ns | 1.6 ns |
| Logic Family | CMOS | — |
| Core Technology | 0.22 µm CMOS, SRAM-based configuration | — |
| Supply Voltage (Core) | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Temperatura de operação | 0 °C to 85 °C (commercial, N suffix) | 0 °C to 85 °C (commercial) |
| Configuration Interface | IEEE 1149.1 JTAG + serial configuration (external EPCx required) | — |
| Tipo de montagem | Surface Mount | Surface Mount |
| Status RoHS | Unknown - not stated in verified sources | [DATA_NEEDED: RoHS compliance] |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Typical Gates | — | 100,000 |
| Maximum System Gates | — | 263,000 |
| Embedded System Blocks (ESBs) | — | Yes (memory + dedicated logic) |
| PLLs | — | 4 |
| Core Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| I/O Voltage Support | — | 1.8 V / 2.5 V / 3.3 V (multiVolt I/O) |
| Process Technology | — | 0.15-µm all-layer copper |
| Configuration Method | — | SRAM (volatile) - external boot PROM required |
| Boundary-Scan Support | — | IEEE 1149.1 (JTAG) |