EP20K400CB652C7N vs EP20K200EBC652-3N Comparação
Comparação detalhada lado a lado de EP20K400CB652C7N por Intel e EP20K200EBC652-3N por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EP20K400CB652C7N | EP20K200EBC652-3N |
|---|---|---|
| Marca | Intel | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $158,00 | $220,00 |
| Family | APEX 20KC | — |
| Device Series | EP20K400 | — |
| System Gates | 400,000 | 200,000 |
| Logic Elements / Cells | 16,640 | 8,320 |
| User I/Os | 502 | — |
| Encapsulamento | 652-ball PBGA (BGA-652) | 652-ball BGA |
| Logic Family | CMOS (SRAM-based) | — |
| Process Technology | 0.15-um all-layer copper | 0.22 µm CMOS |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 2.5 V | — |
| Supply Voltage (general) | 2.5 V | — |
| Pin-to-Pin Propagation Delay | 1.48 ns | — |
| Internal Propagation Delay | 2.5 ns | — |
| Maximum Operating Frequency | 375.94 MHz | — |
| Temperatura de operação | 0 C to 85 C (commercial) | — |
| Tipo de montagem | Surface Mount | Surface Mount |
| Architecture | MultiCore (LUT + embedded memory) | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Series | — | APEX 20KE (APEX-20KE®) |
| Device Family | — | EP20K200 |
| Logic Array Blocks (LABs) | — | 832 |
| Macrocells | — | 832 |
| Embedded RAM | — | 106,496 bits |
| User I/Os (DigiKey listing) | — | 376 |
| User I/Os (digchip listing) | — | 277 |
| Propagation Delay | — | 2.33 ns |
| Internal Frequency (max) | — | 189 MHz |
| Core Supply Voltage | — | 1.71 V to 1.89 V (nominal 1.8 V) |
| I/O Supply (LVDS-capable) | — | LVDS, 2.5 V referenced (per source variant) |
| Operating Temperature (TJ) | — | 0 °C to 85 °C (commercial) |
| Speed Grade | — | -3 (slowest in APEX 20KE family) |
| Configuration | — | JTAG (IEEE 1149.1), Passive Serial |