EP20K400CB652C9N vs EP20K400CB652I7 Comparação
Comparação detalhada lado a lado de EP20K400CB652C9N por Intel e EP20K400CB652I7 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EP20K400CB652C9N | EP20K400CB652I7 |
|---|---|---|
| Marca | Intel | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | NRND | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $195,00 | $149,50 |
| Family | APEX 20KC | APEX 20KC |
| Series | EP20K400 | — |
| Device Type | Programmable Logic Device (SOPC FPGA) | — |
| Architecture | MultiCore (LUT logic + Embedded System Blocks) | — |
| System Gates | 400,000 | — |
| Logic Elements | 16,640 | — |
| Maximum User I/Os | 502 | — |
| Total Memory Bits | 212,992 (per chip) | — |
| Maximum Internal Frequency | 250 MHz | — |
| Propagation Delay | 2.0 ns | — |
| Logic Family | CMOS | — |
| Core Process Technology | 0.15 µm all-layer copper CMOS | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V | — |
| Faixa de temperatura de operação | 0 °C to +85 °C (Commercial) | — |
| Encapsulamento | BGA-652 (Plastic Ball Grid Array, 652 balls) | BGA-652 (652-ball) |
| Tipo de montagem | Surface Mount | — |
| Configuration Interface | IEEE 1149.1 JTAG, serial passive parallel async | — |
| Status RoHS | Unknown (legacy Altera part - verify with distributor) | Non-compliant (JESD-609 e0, contains lead) |
| Device Family | — | Field-Programmable Gate Array (FPGA) |
| Typical Gates | — | 400,000 |
| Logic Elements (LEs) | — | 16,640 |
| Maximum Operating Frequency | — | 375.94 MHz |
| Process Technology | — | 0.15 µm CMOS |
| Core Supply Voltage | — | 1.8 V |
| I/O Supply Voltage | — | 1.8 V / 3.3 V |
| Package Code (JESD-30) | — | S-PBGA-B652 |
| Terminal Form | — | Ball |
| Package Shape | — | Square |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O] |
| Embedded Memory | — | Embedded System Blocks (ESB) - dual-port RAM / FIFO / CAM |
| Configuration Method | — | SRAM + JTAG (ISP) |
| Speed Grade | — | 7 |
| Temperature Grade | — | Industrial (-40 °C to +100 °C) |
| Manufacturer Status | — | Obsolete (Intel/Altera legacy FPGA) |