EP20K600CB652I7 vs EP20K600CF1020C7 Comparação
Comparação detalhada lado a lado de EP20K600CB652I7 por Intel e EP20K600CF1020C7 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EP20K600CB652I7 | EP20K600CF1020C7 |
|---|---|---|
| Marca | Intel | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Última compra |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $149,00 | $212,40 |
| Family | APEX 20KC | APEX 20KC |
| Manufacturer | Intel (formerly Altera) | Altera (now Intel) |
| Technology | 0.15 µm CMOS, SRAM-based | — |
| System Gates | 600,000 | — |
| Logic Elements | 24,320 | — |
| Maximum Internal Frequency | 375.94 MHz | — |
| Propagation Delay | 1.6 ns | — |
| Core Supply Voltage | 1.8 V (1.71 V to 1.89 V range) | — |
| User I/O Count | 488 (4 dedicated inputs + 480 I/O) | 588 |
| Número de saídas | 480 | — |
| Encapsulamento | 652-ball FineLine BGA (LBGA, 1.27 mm pitch) | 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) |
| Tipo de montagem | Surface Mount | Surface Mount (BGA) |
| Temperatura de operação | -40 °C to +85 °C (industrial, 'I' suffix) | — |
| Speed Grade | -7 | 7 |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | — |
| Embedded Memory | ESBs configurable as dual-port RAM / ROM / CAM | — |
| MultiVolt I/O Support | 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant banks | — |
| Status RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Typical Gates | — | 311,000 |
| Maximum System Gates | — | 600,000 |
| Logic Elements / Cells | — | 24,320 |
| Maximum Operating Frequency | — | 375.94 MHz |
| Process Technology | — | 0.15 micrometer CMOS |
| Core Voltage (VCCINT) | — | 1.71 V to 1.89 V (nominal 1.8 V) |
| I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) |
| Total Inputs | — | 580 + 4 dedicated |
| Propagation Delay (Tpd) | — | 1.6 ns |
| Operating Temperature Grade | — | Commercial (C) |
| Configuration Method | — | SRAM-based, serial/parallel passive or enhanced configuration device |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |