EP2A15B652C7 vs EP2A15F672C7AA Comparação
Comparação detalhada lado a lado de EP2A15B652C7 por Intel e EP2A15F672C7AA por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EP2A15B652C7 | EP2A15F672C7AA |
|---|---|---|
| Marca | Intel | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Última compra |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $82,40 | $215,00 |
| Family | APEX II | APEX II |
| Logic Elements | 30000 (approx) | — |
| Typical Gates | 1.5 million | 600K |
| Maximum User I/O Pins | [DATA_NEEDED: exact user I/O count] | — |
| Process Technology | 0.18 micron CMOS | 0.15 micrometer all-layer copper (up to 8 metal layers) |
| Embedded System Blocks (ESB) | Yes - configurable as RAM/ROM or product-term logic | — |
| Supply Voltage - Core | [DATA_NEEDED: VCCINT voltage] | — |
| Supply Voltage - I/O | [DATA_NEEDED: VCCIO voltage] | — |
| Configuration Method | SRAM-based, requires external configuration memory | — |
| Speed Grade | -7 | — |
| Temperatura de operação | 0C to +85C (commercial, suffix C7) | — |
| Encapsulamento | 652-ball BGA | 672-ball FC-FBGA (flip-chip) |
| Tipo de montagem | Surface Mount | — |
| Hot Socketing Support | Yes (MultiCore hot-socketing) | — |
| Status RoHS | [DATA_NEEDED: RoHS status - legacy APEX II family] | Compliant (per Full-Electronic listing) |
| Design Tool | Quartus II (legacy) | — |
| Maximum System Gates | — | 1.4M |
| Logic Elements (LEs) | — | 16,640 |
| Maximum User I/O | — | 492 |
| Operating Frequency (internal) | — | 500 MHz |
| LVDS Data Rate | — | 1 Gbps True-LVDS |
| Core Voltage | — | 1.5 V |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, PCI-X, SSTL, HSTL, LVDS, LVPECL, PCML, HyperTransport |
| MultiVolt I/O Bank Voltages | — | 1.5V / 1.8V / 2.5V / 3.3V |
| Embedded Memory | — | Dual-port RAM blocks + CAM blocks |
| PLLs | — | 4 enhanced PLLs |
| Programming Interfaces | — | Passive Serial, Fast Passive Parallel, JTAG (IEEE 1149.1) |
| Operating Temperature Grade | — | Commercial (0C to +85C) |
| Lifecycle | — | Last-Time-Buy / EOL announced Nov-Dec 2016 |