EP610IPC-10 vs EP610DC-20 Comparação
Comparação detalhada lado a lado de EP610IPC-10 por Altera e EP610DC-20 por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EP610IPC-10 | EP610DC-20 |
|---|---|---|
| Marca | Altera | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $16,40 | $15,85 |
| Family | Altera Classic EPLD | Classic EP610 |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Programmable Gates | 300 usable gates | — |
| Macrocells | 16 | — |
| Maximum Operating Frequency | 100 MHz | — |
| Propagation Delay (tPD) | 15 ns (commerical -10 grade) | 22 ns |
| Product Terms | 160 total | — |
| Dedicated Inputs | 4 | 4 |
| I/O Pins | 16 | 16 (bidirectional) |
| Total Input Pins | 20 | — |
| Tensão de alimentação | 5 V | — |
| Architecture | Turbo-only AND-OR-NOT, PAL-type | — |
| Technology | CMOS EPROM (UV-erasable / OTP) | — |
| Encapsulamento | 24-pin PDIP (Plastic DIP) | 24-pin Ceramic DIP (CDIP-24) with UV window |
| Temperatura de operação | -40C to +85C (industrial) | 0 °C to 70 °C (commercial) |
| Programming Method | Altera programming hardware (UV erase for I grade, OTP for C grade) | UV erasure + parallel programmer |
| TTL Emulation | 100% TTL compatible | — |
| Product Type | — | CMOS UV-Erasable Programmable Logic Device (EPLD) |
| Logic Macrocells | — | 16 |
| Total Usable Pins | — | 20 |
| Product Terms (p-terms) | — | 160 |
| Maximum Toggle Frequency (fMAX) | — | 55.6 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Process Technology | — | CMOS, UV-erasable floating gate |
| Tipo de montagem | — | Through-hole |
| Status RoHS | — | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |