EPC27TC32N vs EPC1TI32 Comparação
Comparação detalhada lado a lado de EPC27TC32N por Altera e EPC1TI32 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EPC27TC32N | EPC1TI32 |
|---|---|---|
| Marca | Altera | Altera |
| Categoria | FPGA & CPLD | Memory ICs |
| Status do ciclo de vida | Unknown | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $0,00 | $9,95 |
| Product Type | Configuration device for SRAM-based LUT devices | — |
| Manufacturer | Altera | — |
| Target Logic Type | SRAM-based LUT devices | — |
| Configuration Memory Capacity | [DATA_NEEDED: configuration memory capacity] | — |
| Configuration Interface | [DATA_NEEDED: configuration interface] | — |
| Programming Mode | [DATA_NEEDED: programming mode] | — |
| Supported FPGA Families | [DATA_NEEDED: supported FPGA families] | — |
| Operating Voltage | [DATA_NEEDED: operating voltage] | — |
| Clock Frequency | [DATA_NEEDED: clock frequency] | — |
| Configuration Startup Time | [DATA_NEEDED: configuration startup time] | — |
| Temperatura de operação | [DATA_NEEDED: operating temperature] | -40 C to +85 C (industrial) |
| Encapsulamento | [DATA_NEEDED: package] | 32-pin TQFP (7 x 7 mm) |
| Contagem de pinos | [DATA_NEEDED: pin count] | — |
| Tipo de montagem | [DATA_NEEDED: mounting type] | Surface Mount |
| Package Dimensions | [DATA_NEEDED: package dimensions] | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status from datasheet] |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | — |
| Halogen-Free Status | [DATA_NEEDED: halogen-free status] | — |
| Conflict-Mineral Status | [DATA_NEEDED: conflict-mineral status] | — |
| Tipo de memória | — | FPGA Configuration PROM (Serial, OTP) |
| Memory Density | — | 1 Mbit (1,046,496 bits) |
| Interface | — | Altera 4-pin serial (DCLK, DATA, nCONFIG, nSTATUS) |
| Programming Interface | — | JTAG (IEEE 1149.1) |
| Tensão de alimentação | — | 3.3 V (derived from VCCIO of target FPGA) |
| Compatible FPGAs | — | ACEX 1K, FLEX 10K, FLEX 6000, MAX 9000 |
| Replacement For | — | EPC1064, EPC1441 |
| Configuration Software | — | Quartus II, MAX+PLUS II |
| Programming Hardware | — | MasterBlaster / ByteBlasterMV / USB-Blaster |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Nível MSL | — | [DATA_NEEDED: MSL level] |