EPC2LC20NU vs EPC2LC20ES Comparação
Comparação detalhada lado a lado de EPC2LC20NU por Altera e EPC2LC20ES por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EPC2LC20NU | EPC2LC20ES |
|---|---|---|
| Marca | Altera | Intel |
| Categoria | Memory ICs | Memory ICs |
| Status do ciclo de vida | Obsolete | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $8,20 | $5,85 |
| Função | In-System Programmable Configuration PROM | — |
| Memory Density | 1.6 Mbit | — |
| FPGA Interface | Altera serial (4-pin: nCS, DCLK, DATA, nINIT_CONF) | — |
| Supply Voltage (VCC) | 3.0 V to 3.6 V | — |
| I/O Tolerance | 5 V tolerant inputs (per datasheet, except JTAG pins) | — |
| Programming Method | In-system via IEEE 1149.1 JTAG | — |
| JTAG Support | Yes (IEEE Std 1149.1 boundary-scan compliant) | — |
| Cascade Support | Yes - daisy-chain for larger bitstreams | — |
| Minimum DC Input | -0.3 V (inputs may undershoot to -2.0 V for <20 ns) | — |
| Maximum Overshoot | 7.0 V for <100 mA and <20 ns | — |
| Encapsulamento | 20-pin J-lead PLCC (9x9 mm) | 20-PLCC (J-lead, 9x9 mm) |
| Tipo de montagem | Surface Mount | Surface Mount / Through-Hole (PLCC socket) |
| Lead-Free / RoHS | Non-LEAD / non-RoHS (NU suffix = matte tin Sn finish, not Pb-free) | — |
| Temperatura de operação | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| Compatibility | Altera APEX 20K, APEX II, Mercury, FLEX 10K, ACEX 1K, Cyclone (legacy serial configuration) | — |
| Tipo de memória | — | Configuration PROM (Non-volatile) |
| Tamanho da memória | — | 1.6 Mbit |
| Target Device | — | SRAM-based FPGAs and LUT devices |
| Interface | — | Serial (DCLK/DATA) with JTAG ISP |
| Operating Voltage | — | 3.3 V and 5.0 V tolerant |
| JTAG Standard | — | IEEE Std. 1149.1 compliant |
| In-System Programmability | — | Yes (via built-in JTAG) |
| Boundary-Scan Test (BST) | — | Built-in, IEEE 1149.1 compliant |
| Configuration Modes | — | Serial and parallel supported |
| Contagem de pinos | — | 20 |
| Status RoHS | — | Compliant (ES suffix denotes lead-free industrial) |
| Programming Interface | — | JTAG (4-wire: TDI/TDO/TMS/TCK) |
| Manufacturer | — | Intel (formerly Altera) |