EPC448PC-20 vs EPC2LC20 Comparação

Comparação detalhada lado a lado de EPC448PC-20 por Altera e EPC2LC20 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.

Comparação de especificações

Parâmetro EPC448PC-20 EPC2LC20
Marca Altera Altera
Categoria Memory ICs Memory ICs
Status do ciclo de vida Obsolete NRND
Status do estoque In Stock In Stock
Preço unitário (USD) $10,25 $7,20
Device Family Enhanced Configuration Device (EPC) —
Memory Density 4 Mbit (4,194,304 bits) —
Speed Grade -20 —
Supply Voltage (VCC) 3.3 V —
Configuration Clock (Max) 20 MHz —
Interface to FPGA Dedicated Altera/Intel configuration serial (Active Serial) —
Programming Interface JTAG (IEEE 1149.1) ISP IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant
Encapsulamento 20-ball PC-BGA 20-pin PLCC (J-lead, 9x9 mm)
Tipo de montagem Surface Mount Surface Mount
Temperatura de operação [DATA_NEEDED: operating temperature range] -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet]
Configuration Time (typical 4 Mbit) Approx. 200 ms at 20 MHz —
Supported FPGA Series APEX 20K, ACEX 1K, Cyclone, Cyclone II/III, Stratix/Stratix II —
Compression Supported (1.5x to 2x depending on bitstream) —
Status RoHS [DATA_NEEDED: RoHS status] Non-Compliant (original Altera Pb-containing part)
Lead-Free [DATA_NEEDED: lead-free status] —
Tipo de memória — Non-volatile configuration PROM
Tamanho da memória — 1.6 Mbit
Configuration Interface — Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE
Supply Voltage VCC — 3.0 V to 3.6 V (3.3-V operation)
ISP Voltage Range — 5.0 V or 3.3 V
Supported FPGA Families — ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000
Cascade Support — Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams
Lead-Free Version — EPC2LC20N available as lead-free equivalent
Programming Support — Altera Programming Unit (APU), Quartus II, JTAG programmer
Boundary-Scan — IEEE 1149.1 compliant, 8-bit or 16-bit JTAG

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