EPF10K50VRC240-1 vs EPF10K50VRC240-3 Comparação
Comparação detalhada lado a lado de EPF10K50VRC240-1 por Intel e EPF10K50VRC240-3 por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Intel
EPF10K50VRC240-3 - 50K Gate Flex 10K FPGA, 189 I/O, 240-RQFP | Intel / Altera
EPF10K50VRC240-3 NrndComparação de especificações
| Parâmetro | EPF10K50VRC240-1 | EPF10K50VRC240-3 |
|---|---|---|
| Marca | Intel | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | NRND |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $130,32 | $61,75 |
| Family | FLEX 10K | Flex 10K (FLEX 10K, SRAM-based) |
| Logic Elements | 2,880 | — |
| Typical Gates | 50,000 | 50,000 |
| Embedded Memory | 20,480 bits (189 Kb) | — |
| User I/O | 274 (max) | — |
| Number of I/O Pins | 189 | — |
| Encapsulamento | 240-RQFP Exposed Pad | 240-BFQFP (RQFP) Exposed Pad |
| Pins | 240 | — |
| Core Voltage (VCCINT) | 3.3 V | — |
| I/O Voltage (VCCIO) | MultiVolt (2.5 V / 3.3 V / 5 V tolerant) | — |
| Internal Frequency (max) | 66.67 MHz | — |
| Propagation Delay | 0.6 ns | 0.6 ns |
| Process Technology | 0.42 µm CMOS | — |
| Logic Family | CMOS | — |
| Temperatura de operação | 0 °C to +70 °C (Commercial) | 0°C to 70°C (Commercial) |
| JTAG Support | Yes (IEEE Std 1149.1-1990) | — |
| Configuration Interface | JTAG / BitBlaster / ByteBlasterMV / Jam STAPL | — |
| Programming Language | Altera MAX+PLUS II / Quartus | — |
| Tipo de montagem | Surface Mount | Surface Mount |
| Status RoHS | Compliant | [DATA_NEEDED: RoHS compliance per datasheet] |
| Series | — | Flex 10K |
| Manufacturer | — | Intel (formerly Altera) |
| Logic Elements / Cells | — | 2,880 |
| Logic Array Blocks (LABs) | — | 360 |
| Embedded Memory (bits) | — | 20,480 (EABs) |
| User I/Os | — | 189 |
| Contagem de pinos | — | 240 |
| Internal Frequency | — | 66.67 MHz |
| Speed Grade | — | -3 (mid-range) |
| Core Voltage | — | 3.3 V |
| Configuration Method | — | SRAM, JTAG (IEEE 1149.1), serial |