EPF81500AQC240-2 vs EPF81500AQC240-2N Comparação
Comparação detalhada lado a lado de EPF81500AQC240-2 por Altera e EPF81500AQC240-2N por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EPF81500AQC240-2 | EPF81500AQC240-2N |
|---|---|---|
| Marca | Altera | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $61,40 | $18,95 |
| Family | FLEX 8000 | — |
| Logic Elements | 1296 | — |
| Number of Logic Array Blocks (LABs) | 162 | — |
| Number of I/Os | 181 | — |
| Tensão de alimentação | 4.75 V to 5.25 V | 4.75 V to 5.25 V |
| Speed Grade | -2 | — |
| Encapsulamento | 240-BFQFP (240-pin Fine-pitch QFP, 32x32 mm) | — |
| Tipo de montagem | Surface Mount (gull-wing leads) | Surface Mount |
| Configuration Memory | SRAM (volatile, requires configuration download on power-up) | — |
| Configuration Mode | Serial (BitBlaster) or parallel JTAG | — |
| Operating Temperature (Commercial) | 0 C to +70 C | — |
| Process Technology | CMOS SRAM, 5 V tolerant I/O | 0.42 micrometer CMOS |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Status RoHS | [DATA_NEEDED: RoHS compliance status] | — |
| Lead-Free | [DATA_NEEDED: lead-free terminal finish] | — |
| Nível MSL | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Manufacturer | — | Altera (Intel) |
| Series | — | FLEX 8000 |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Logic Family / Cells | — | 1,296 logic elements (LEs) |
| Usable Gates | — | 16,000 |
| Registers | — | 1,500 |
| User I/O Count | — | 181 |
| Propagation Delay | — | 1.7 ns |
| Maximum Frequency | — | 125 MHz |
| Logic Family | — | CMOS |
| Temperatura de operação | — | 0 C to 70 C (Commercial) |
| Package Type | — | 240-BFQFP (PQFP) |
| Package Dimensions | — | 32 x 32 mm |
| Supplier Device Package | — | 240-PQFP |
| Configuration Method | — | Serial EPROM / JTAG (IEEE 1149.1) |