EPM1270F256I5N vs EPM2210F256I5 Comparação
Comparação detalhada lado a lado de EPM1270F256I5N por Intel e EPM2210F256I5 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EPM1270F256I5N | EPM2210F256I5 |
|---|---|---|
| Marca | Intel | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $14,85 | $20,80 |
| Series | MAX II | MAX II CPLD |
| Family | MAX II (EPM1270) | MAX II |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Macro Cells | 980 | — |
| Logic Elements | 1270 | — |
| User I/O Pins | 212 | — |
| User Flash Memory | 8 Kbits | 8 Kbit |
| Maximum Operating Frequency | 201.1 MHz | — |
| Pin-to-Pin Logic Delay | 6.2 ns (I5 speed grade) | — |
| External Supply Voltage | 2.5 V / 3.3 V | — |
| Internal Core Voltage | 1.8 V (on-chip regulator) | — |
| I/O Bank Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) + 3.3 V PCI-compliant bank | — |
| Process Technology | 0.18-micron Flash-based CMOS | — |
| Configuration Memory | Non-volatile Flash (instant-on) | — |
| Programming Interface | JTAG IEEE 1149.1 (boundary-scan + ISP) | — |
| Encapsulamento | 256-ball FBGA (FineLine BGA), 17 x 17 mm | — |
| Temperatura de operação | -40C to +100C (TJ), industrial | — |
| Speed Grade | I5 (industrial, 6.2 ns tPD) | — |
| Tipo de montagem | Surface Mount (SMT, BGA) | Surface Mount |
| Status RoHS | Compliant | Non-compliant (contains lead, per IC Components datasheet) |
| Livre de halogênio | Compliant (per GlobalSpec) | — |
| Country of Origin | Malaysia / Republic of Korea | — |
| Number of Macrocells | — | 1700 |
| Number of Logic Elements | — | 2210 |
| Maximum Internal Frequency | — | 201.1 MHz |
| Maximum Propagation Delay (tpd) | — | 7.0 ns |
| Supply Voltage - Internal | — | 2.5 V, 3.3 V |
| Operating Temperature (TJ) | — | -40 C to +100 C |
| Encapsulamento / Caixa | — | 256-FBGA (17x17) |
| Programmable I/O Pins | — | [DATA_NEEDED: number of user I/O pins] |
| Number of Logic Array Blocks | — | 16 |
| I/O Voltage Standards | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| JTAG Compliant | — | Yes (IEEE 1149.1) |
| In-System Programmable | — | Yes (via ByteBlaster/USB-Blaster) |
| Delivery Type | — | Tray |