EPM3032ALC44-7 vs EPM3032ALC44-7N Comparação
Comparação detalhada lado a lado de EPM3032ALC44-7 por Altera e EPM3032ALC44-7N por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EPM3032ALC44-7 | EPM3032ALC44-7N |
|---|---|---|
| Marca | Altera | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | NRND |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $0,95 | $1,05 |
| Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Logic Elements / Macrocells | 32 macrocells | — |
| Logic Array Blocks (LABs) | 2 | — |
| System Gates | 600 | — |
| Number of User I/O Pins | 34 | — |
| Global Clocks | 2 | — |
| Propagation Delay (tPD1, max) | 7.5 ns | — |
| Maximum Internal Frequency (fMAX) | 138.9 MHz | — |
| Supply Voltage (VCCINT / VCCIO) | 3.3 V | — |
| I/O Tolerant Voltage | 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Program Memory Type | EEPROM | — |
| In-System Programming (ISP) | Yes - IEEE 1149.1 JTAG | — |
| Temperatura de operação | 0 °C to +70 °C (Commercial) | 0C to +70C (commercial grade) |
| Encapsulamento | 44-pin PLCC (J-Lead), 16.59 x 16.59 mm, 3.81 mm height | 44-PLCC (J-Lead, 16.59 x 16.59 mm) |
| Tipo de montagem | Surface Mount | Surface Mount (PLCC socket compatible) |
| Status RoHS | Not Compliant (per Arrow listing) | [DATA_NEEDED: RoHS compliance status] |
| Part Status | Obsolete | — |
| ECCN | EAR99 | — |
| Manufacturer | — | Altera (Intel) |
| Series | — | MAX 3000A |
| Macro Cells | — | 32 |
| Logic Gates | — | 600 usable gates |
| Propagation Delay (tPD1) | — | 7.5 ns (max, pin-to-pin) |
| Internal Counter Frequency (fCNT) | — | 227.3 MHz (max) |
| Number of Logic Elements / Blocks | — | 2 LABs (16 macrocells each) |
| Number of I/O Pins | — | 34 usable I/O (44 total package pins) |
| Number of Dedicated Inputs | — | 4 |
| Programmable Type | — | In-System Programmable (ISP) via JTAG (IEEE 1149.1) |
| Tipo de memória | — | EEPROM (non-volatile, 100 program/erase cycles) |
| Supply Voltage - Internal (VCCINT) | — | 3.0 V to 3.6 V (3.3 V typical) |
| I/O Bank Voltage (VCCIO) | — | MultiVolt: 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant |
| Nível MSL | — | 3 (168 hours) |
| Process Technology | — | CMOS EEPROM |