EPM3064ALI44-10N vs EPM3064ATI44-10 Comparação

Comparação detalhada lado a lado de EPM3064ALI44-10N por Altera e EPM3064ATI44-10 por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.

Comparação de especificações

Parâmetro EPM3064ALI44-10N EPM3064ATI44-10
Marca Altera Intel
Categoria FPGA & CPLD FPGA & CPLD
Status do ciclo de vida NRND NRND
Status do estoque In Stock In Stock
Preço unitário (USD) $7,80 $7,65
Series MAX 3000A —
Programmable Type In System Programmable (ISP) In-System Programmable (ISP), EEPROM-based
Number of Macrocells 64 64
Number of I/O 34 —
Logic Gates 1250 gates —
Number of Logic Elements/Blocks 4 LABs —
Propagation Delay (tPD) 10 ns (speed grade -10) —
Counter Frequency up to 227.3 MHz —
Supply Voltage - Core 3.3 V —
I/O Logic Level Support 5.0 V / 3.3 V / 2.5 V (MultiVolt) —
Programming Interface IEEE Std. 1149.1 JTAG —
Temperatura de operação -40 C to +85 C (Industrial) -40C to +85C (Industrial)
Encapsulamento 44-pin PLCC (J-Lead) TQFP-44 (10x10 mm, 0.8 mm pitch)
Tipo de montagem Surface Mount (socketable PLCC) Surface Mount
Lead Free / RoHS Status Lead Free, RoHS Compliant —
Hot-Socketing Support Yes —
Configuration Memory CMOS EEPROM (non-volatile) —
Family — MAX 3000A
Product Type — CPLD (Complex Programmable Logic Device)
Number of Logic Array Blocks (LABs) — 4
Number of Usable Gates — 1,250
Number of User I/O Pins — 34
Pin-to-Pin Delay (tPD) — 10 ns
Maximum Counter Frequency — 227.3 MHz
Supply Voltage (VCCINT) — 3.3 V
I/O Voltage Tolerance — 5.0 V tolerant (MultiVolt I/O)
JTAG Interface — IEEE Std. 1149.1 compliant
ISP Standard — IEEE Std. 1532
Status RoHS — Non-Compliant (contains lead, per DigiChip listing)
Lead Free Status — Contains Lead
Process Technology — CMOS, EEPROM
Programming Cycles — [DATA_NEEDED: typical program/erase endurance]

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