EPM3064ATC44-10NAF vs EPM3064ALI44-10N Comparação
Comparação detalhada lado a lado de EPM3064ATC44-10NAF por Altera e EPM3064ALI44-10N por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Altera
EPM3064ATC44-10NAF - 64-Macrocell MAX 3000A CPLD, 10ns TQFP-44 | Intel
EPM3064ATC44-10NAF Nrnd
Comparação de especificações
| Parâmetro | EPM3064ATC44-10NAF | EPM3064ALI44-10N |
|---|---|---|
| Marca | Altera | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | NRND | NRND |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $5,05 | $7,80 |
| Series | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 64 | — |
| Logic Elements / LABs | 4 LABs (16 macrocells per LAB) | — |
| Usable Gates | 1250 | — |
| Number of I/O Pins | 34 | — |
| Propagation Delay (tPD, max) | 10 ns | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| I/O Voltage Tolerance | Multi-voltage (3.3 V / 2.5 V / 1.8 V capable) | — |
| Programmable Technology | EEPROM (non-volatile) | — |
| In-System Programmable | Yes (IEEE Std. 1532 compliant) | — |
| Boundary-Scan Test | Yes (IEEE Std. 1149.1 JTAG) | — |
| Pin-Locking | Yes | — |
| Encapsulamento | TQFP-44 (10x10 mm) | 44-pin PLCC (J-Lead) |
| Tipo de montagem | Surface Mount | Surface Mount (socketable PLCC) |
| Temperatura de operação | [DATA_NEEDED: industrial/commercial grade] | -40 C to +85 C (Industrial) |
| Lead Finish | Lead-free (NiPdAu, AF suffix) | — |
| Status RoHS | Compliant | — |
| Configuration Memory Cycles | 100 erase/program cycles | — |
| Programmable Type | — | In System Programmable (ISP) |
| Number of Macrocells | — | 64 |
| Number of I/O | — | 34 |
| Logic Gates | — | 1250 gates |
| Number of Logic Elements/Blocks | — | 4 LABs |
| Propagation Delay (tPD) | — | 10 ns (speed grade -10) |
| Counter Frequency | — | up to 227.3 MHz |
| Supply Voltage - Core | — | 3.3 V |
| I/O Logic Level Support | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| Programming Interface | — | IEEE Std. 1149.1 JTAG |
| Lead Free / RoHS Status | — | Lead Free, RoHS Compliant |
| Hot-Socketing Support | — | Yes |
| Configuration Memory | — | CMOS EEPROM (non-volatile) |