EPM3128ATC100-10NS vs EPM3128ATC100-5 Comparação
Comparação detalhada lado a lado de EPM3128ATC100-10NS por Intel e EPM3128ATC100-5 por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EPM3128ATC100-10NS | EPM3128ATC100-5 |
|---|---|---|
| Marca | Intel | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $6,50 | $15,43 |
| Family | MAX 3000A | CPLD - MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 128 | — |
| User I/Os | 80 | 80 |
| Contagem de pinos | 100 | — |
| Encapsulamento | TQFP-100 | 100-pin TQFP (Fine Line) |
| Pin-to-Pin Logic Delay (tPD) | 10 ns | — |
| Counter Frequency (fCNT) | up to 227.3 MHz | — |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| Supply Voltage - I/O (VCCIO) | 3.3 V or 2.5 V (5.0 V-tolerant inputs) | — |
| Logic-Level Compatibility | 5.0 V, 3.3 V, 2.5 V | — |
| Programmability | In-system (ISP), IEEE Std. 1532 | — |
| Boundary Scan | IEEE 1149.1 JTAG | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| Temperatura de operação | [DATA_NEEDED: operating temperature range] | 0 °C to 70 °C (Commercial) |
| Tipo de montagem | Surface Mount | Surface Mount |
| Status RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Series | — | MAX 3000A |
| Macrocells | — | 128 |
| Usable Gates | — | 2,500 |
| Dedicated Inputs | — | 4 |
| Pin-to-Pin Delay (tpd) | — | 5 ns (commercial); 7.5 ns |
| Maximum Frequency (fCNT) | — | 192.3 MHz |
| Supply Voltage (VCCINT/VCCIO) | — | 3.3 V |
| Output Drive Voltage | — | 2.5 V or 3.3 V (programmable) |
| Input Tolerance | — | 2.5 V, 3.3 V, 5.0 V tolerant |
| Program Memory Type | — | EEPROM |
| In-System Programmability | — | Yes, IEEE Std. 1532 compliant |
| JTAG Boundary Scan | — | Yes, IEEE Std. 1149.1 |
| Logic Family | — | CMOS |
| Process Technology | — | CMOS EEPROM |