EPM3128ATC100-5 vs EPM3128ATC100-10N Comparação
Comparação detalhada lado a lado de EPM3128ATC100-5 por Intel e EPM3128ATC100-10N por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Altera
EPM3128ATC100-10N - 128-Macrocell MAX 3000A CPLD, 10ns, TQFP-100 | Intel
EPM3128ATC100-10N NrndComparação de especificações
| Parâmetro | EPM3128ATC100-5 | EPM3128ATC100-10N |
|---|---|---|
| Marca | Intel | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | NRND |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $15,43 | $5,20 |
| Series | MAX 3000A | — |
| Family | CPLD - MAX 3000A | MAX 3000A |
| Macrocells | 128 | — |
| Usable Gates | 2,500 | 2500 |
| User I/Os | 80 | — |
| Dedicated Inputs | 4 | — |
| Pin-to-Pin Delay (tpd) | 5 ns (commercial); 7.5 ns | — |
| Maximum Frequency (fCNT) | 192.3 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 3.3 V | — |
| Output Drive Voltage | 2.5 V or 3.3 V (programmable) | — |
| Input Tolerance | 2.5 V, 3.3 V, 5.0 V tolerant | — |
| Program Memory Type | EEPROM | — |
| In-System Programmability | Yes, IEEE Std. 1532 compliant | — |
| JTAG Boundary Scan | Yes, IEEE Std. 1149.1 | — |
| Temperatura de operação | 0 °C to 70 °C (Commercial) | 0 °C to +70 °C (commercial) |
| Encapsulamento | 100-pin TQFP (Fine Line) | 100-pin TQFP (14 x 14 x 1.0 mm) |
| Tipo de montagem | Surface Mount | Surface Mount |
| Logic Family | CMOS | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Process Technology | CMOS EEPROM | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 128 |
| Number of I/O | — | 80 |
| Logic Elements / Blocks | — | 8 LABs (16 macrocells each) |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Internal Frequency (fMAX) | — | 98 MHz |
| Supply Voltage VCCINT | — | 3.3 V |
| I/O Bank Voltage VCCIO | — | 3.3 V or 2.5 V (selectable) |
| Configuration Memory | — | CMOS EEPROM (non-volatile, instant-on) |
| In-System Programming | — | IEEE Std. 1532-compliant ISP via JTAG |
| Lead-Free | — | Yes |
| Nível MSL | — | 3 (per JEDEC J-STD-020) |