EPM3256ATC144-10 vs EPM3256ATI144-10N Comparação

Comparação detalhada lado a lado de EPM3256ATC144-10 por Intel e EPM3256ATI144-10N por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.

Comparação de especificações

Parâmetro EPM3256ATC144-10 EPM3256ATI144-10N
Marca Intel Altera
Categoria FPGA & CPLD FPGA & CPLD
Status do ciclo de vida Obsolete Obsolete
Status do estoque In Stock In Stock
Preço unitário (USD) $9,75 $10,25
Manufacturer Intel (formerly Altera) —
Series MAX 3000A —
Device Type CPLD - Complex Programmable Logic Device CPLD - Complex Programmable Logic Device
Programmable Type In-System Programmable (EEPROM-based, IEEE 1532) —
Macrocells 256 256
Logic Array Blocks (LABs) 16 —
Usable Gates 5,000 5,000
Number of I/O Pins 116 —
Propagation Delay (tpd max) 10 ns —
Counter Frequency (max) 95.2 MHz —
Core Supply Voltage (VCCINT) 3.0 V to 3.6 V (3.3 V nominal) —
I/O Logic Level Support MultiVolt - 5.0 V, 3.3 V, 2.5 V —
Temperatura de operação 0 C to +70 C (Commercial) -40 C to +85 C (industrial, "I" suffix)
Encapsulamento 144-pin TQFP (20x20 mm) 144-pin TQFP
Tipo de montagem Surface Mount Surface Mount
JTAG / Boundary Scan Yes (IEEE 1149.1) —
Process Technology CMOS EEPROM CMOS EEPROM-based, non-volatile
Status RoHS Non-compliant (original EPM3256ATC144-10); N suffix variant is lead-free Compliant
Family — MAX 3000A
User I/Os — 116
Logic Blocks / Logic Elements — 16
Propagation Delay (tPD) — 10 ns
Max Frequency (fMAX) — 95.2 MHz
Supply Voltage - Core — 3.3 V
I/O Voltage Support — 1.8 V / 2.5 V / 3.3 V (multi-voltage)
In-System Programmability — Yes, IEEE Std. 1532 compliant
Boundary-Scan Test (BST) — Yes, IEEE Std. 1149.1 (JTAG)
Lead-Free / Pb-Free — Yes ("N" suffix)
Nível MSL — 3 (per JEDEC J-STD-020, typical for TQFP)

Fichas técnicas e recursos

Ver todos os produtos Criar BOM Solicitar cotação