EPM3256ATC144-10 vs EPM3256ATI144-7N Comparação
Comparação detalhada lado a lado de EPM3256ATC144-10 por Intel e EPM3256ATI144-7N por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Intel
EPM3256ATC144-10 - 256-Macrocell CPLD, 10ns, 144-TQFP | Intel / Altera
EPM3256ATC144-10 ObsoleteAltera
EPM3256ATI144-7N - 256-Macrocell MAX 3000A CPLD, 7.5ns, TQFP-144 | Altera
EPM3256ATI144-7N ObsoleteComparação de especificações
| Parâmetro | EPM3256ATC144-10 | EPM3256ATI144-7N |
|---|---|---|
| Marca | Intel | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $9,75 | $10,95 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | MAX 3000A | — |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD (Complex Programmable Logic Device) |
| Programmable Type | In-System Programmable (EEPROM-based, IEEE 1532) | — |
| Macrocells | 256 | 256 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Usable Gates | 5,000 | 5,000 |
| Number of I/O Pins | 116 | — |
| Propagation Delay (tpd max) | 10 ns | — |
| Counter Frequency (max) | 95.2 MHz | — |
| Core Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V nominal) | 3.3 V |
| I/O Logic Level Support | MultiVolt - 5.0 V, 3.3 V, 2.5 V | — |
| Temperatura de operação | 0 C to +70 C (Commercial) | -40C to +85C (industrial) |
| Encapsulamento | 144-pin TQFP (20x20 mm) | TQFP-144 (20 x 20 mm, 0.5 mm pitch) |
| Tipo de montagem | Surface Mount | — |
| JTAG / Boundary Scan | Yes (IEEE 1149.1) | — |
| Process Technology | CMOS EEPROM | — |
| Status RoHS | Non-compliant (original EPM3256ATC144-10); N suffix variant is lead-free | Compliant (lead-free) |
| Family | — | MAX 3000A |
| Maximum User I/O Pins | — | 116 |
| Propagation Delay (tPD) | — | 7.5 ns (typical) |
| Maximum Internal Frequency | — | 126.6 MHz |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 2.5 V |
| MultiVolt I/O Logic Levels | — | 5.0 V / 3.3 V / 2.5 V |
| Programming Technology | — | EEPROM (in-system programmable) |
| JTAG / ISP | — | IEEE Std. 1532 compliant |
| Boundary Scan | — | IEEE Std. 1149.1 (JTAG) |
| Hot-Socketing Support | — | Yes |