EPM3512AFC256-20 vs EPM3512AFC256-22 Comparação
Comparação detalhada lado a lado de EPM3512AFC256-20 por Altera e EPM3512AFC256-22 por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Altera
EPM3512AFC256-20 - MAX 3000A CPLD, 512 Macrocells, BGA-256 | Altera
EPM3512AFC256-20 Obsolete
Comparação de especificações
| Parâmetro | EPM3512AFC256-20 | EPM3512AFC256-22 |
|---|---|---|
| Marca | Altera | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $9,75 | $16,10 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | 512 |
| Typical Usable Gates | 10,000 | — |
| Speed Grade | -20 (20 ns tPD) | -22 (tPD ~22 ns) |
| Encapsulamento | 256-ball FBGA (Fine-pitch BGA) | FC-256 (FineLine BGA, 256 balls, 1.0 mm pitch) |
| Contagem de pinos | 256 | — |
| Operating Voltage (VCCINT) | 3.3 V (3.0 V to 3.6 V) | — |
| I/O Voltage (VCCIO) | 2.5 V or 3.3 V (5.0 V tolerant inputs) | — |
| I/O Standards | LVTTL, LVCMOS, 2.5 V, 3.3 V, 5.0 V tolerant | — |
| Program Memory Type | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | — |
| JTAG Support | Yes (boundary-scan + ISP) | — |
| Tipo de montagem | Surface Mount | Surface Mount (BGA) |
| Temperatura de operação | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature grade] |
| Status RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| Nível MSL | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Configuration Memory | Internal EEPROM | On-chip EEPROM (non-volatile) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 208 (typical for FC256 package) |
| Propagation Delay (tPD) | — | 22 ns |
| Supply Voltage VCCINT | — | 3.3 V |
| I/O Standards Supported | — | 2.5 V, 3.3 V, 5.0 V (VCCIO selectable) |
| In-System Programming | — | IEEE Std. 1532-compliant ISP via JTAG |