EPM5064JI-1 vs EPM5064JC-2 Comparação
Comparação detalhada lado a lado de EPM5064JI-1 por Intel e EPM5064JC-2 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EPM5064JI-1 | EPM5064JC-2 |
|---|---|---|
| Marca | Intel | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | NRND | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $3,40 | $23,10 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 64 | 64 |
| User I/O Pins | [DATA_NEEDED: user I/O count from datasheet] | — |
| Encapsulamento | 68-pin PLCC (windowed ceramic) | 28-pin CLCC (J-lead, ceramic, windowed) |
| Logic Elements | [DATA_NEEDED: total logic elements] | — |
| Propagation Delay (tPD) | [DATA_NEEDED: combinational tPD from datasheet] | 45 ns |
| Tensão de alimentação | 5 V | — |
| Temperatura de operação | [DATA_NEEDED: commercial vs industrial grade temp range] | [DATA_NEEDED: commercial or industrial grade] |
| Process Technology | CMOS, UV-erasable | — |
| Speed Grade | JI-1 (commercial, -10/-12/-15 family) | — |
| Programmability | UV-erasable (windowed package) | — |
| Data Retention | 25 years (per MAX 5000 datasheet) | — |
| Tipo de montagem | Surface Mount | — |
| Status RoHS | [DATA_NEEDED: not stated in provided data] | — |
| Logic Array Blocks (LABs) | — | 4 |
| Maximum Clock Frequency (fMAX) | — | 50 MHz |
| Usable Gates | — | 1250 |
| Dedicated Inputs | — | 7 |
| I/O Pins | — | 28 |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Technology | — | CMOS, UV-erasable EPROM |
| Supply Voltage (VCC) | — | 5 V (4.75 V to 5.25 V) |
| Programming Method | — | UV-erase + EPROM programmer (not ISP) |
| Compliance | — | RoHS status unknown (ceramic/J-lead windowed part, legacy product) |