EPM5192ALC84-15 vs EPM5192ALI84-20 Comparação

Comparação detalhada lado a lado de EPM5192ALC84-15 por Altera e EPM5192ALI84-20 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.

Comparação de especificações

Parâmetro EPM5192ALC84-15 EPM5192ALI84-20
Marca Altera Altera
Categoria FPGA & CPLD FPGA & CPLD
Status do ciclo de vida Obsolete Obsolete
Status do estoque In Stock In Stock
Preço unitário (USD) $13,20 $9,90
Device Family MAX 5000 (EPM5192) —
Device Type CPLD / UV-Erasable / OTP Complex PLD EPLD (UV-erasable / OTP Complex PLD)
Macrocells 192 192
Dedicated Inputs 7 —
User I/O Pins 64 —
Propagation Delay (tPD) 15 ns 20 ns (pin-compatible speed grade)
Propagation Delay (Industry Variant) 25 ns (per MicrochipUSA listing) —
Supply Voltage (VCC) 4.75 V to 5.25 V (nominal 5 V) —
Process Technology CMOS (EPROM-based) CMOS, EPROM-based
Programmability UV-erasable window / OTP UV-erasable / one-time programmable (OTP)
Encapsulamento 84-pin PLCC (QCCJ, J-bend ceramic) —
Operating Temperature Grade Commercial Industrial (I)
Terminal Form J-BEND —
Package Code QCCJ QCCJ (Plastic Leaded Chip Carrier, J-bend)
Package Shape SQUARE —
Architecture Programmable Logic Array + Macrocell Registers + PIA interconnect —
Family — MAX 5000
User I/O Pins (max) — 84 (in PLCC-84 package)
Tensão de alimentação — 5 V (single supply, TTL-compatible I/O)
Package Type — PLCC-84 (PQCC-84)
No. of Terminals — 84
Form of Terminal — J-BEND
Tipo de montagem — Surface Mount (PLCC socket compatible)
Logic Type — Combinatorial and registered, per-macrocell DFF
I/O Standard — TTL-compatible
Status RoHS — [DATA_NEEDED: RoHS status - Altera MAX 5000 series is generally legacy and may not be RoHS compliant]

Fichas técnicas e recursos

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