EPM5192ALC84-20 vs EPM5192AJI84-20 Comparação

Comparação detalhada lado a lado de EPM5192ALC84-20 por Altera e EPM5192AJI84-20 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.

Comparação de especificações

Parâmetro EPM5192ALC84-20 EPM5192AJI84-20
Marca Altera Altera
Categoria FPGA & CPLD FPGA & CPLD
Status do ciclo de vida Obsolete Obsolete
Status do estoque In Stock In Stock
Preço unitário (USD) $19,40 $10,95
Device Type UV-Erasable/OTP Complex PLD (EPLD) UV-Erasable / OTP Complex PLD
Series Altera MAX 5000 —
Macrocells 192 —
Process Technology CMOS CMOS
Speed Grade -20 (20 ns pin-to-pin delay) —
Encapsulamento 84-pin PLCC (Plastic Leaded Chip Carrier) —
Terminal Pitch 1.270 mm —
Terminal Form J-bend J-Bend
Package Code QCCJ (PLCC-84) WQCCJ (JEDEC)
Package Shape Square —
Temperature Grade Commercial —
Programming Method UV-erase + EPROM (One-Time-Programmable option) —
Logic Family MAX 5000 EPLD —
I/O Compatibility TTL-compatible —
Tipo de montagem Surface Mount (PLCC socket-compatible) Surface Mount
Configuration Memory EPROM (UV-erasable) —
Status RoHS [DATA_NEEDED: RoHS status not in provided web data] [DATA_NEEDED: RoHS status of EPM5192AJI84-20]
Device Family — MAX 5000 (EPM5192)
Logic Cells / Macrocells — 192 macrocells
Propagation Delay (tPD) — 33 ns
Maximum Frequency (fCNT) — 66.7 MHz
Supply Voltage (VCC) — 5 V nominal (4.5 V to 5.5 V)
Operating Temperature Grade — Industrial
Package Type — 84-pin J-bend Ceramic Chip Carrier (PLCC-84, JI)
Number of Terminals — 84
Programmability — UV-erasable window + OTP
Contagem de pinos — 84
Status do ciclo de vida — Obsolete (legacy Altera MAX 5000)

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