EPM7128ELC84-12 vs EPM7128SLC84-7N Comparação
Comparação detalhada lado a lado de EPM7128ELC84-12 por Altera e EPM7128SLC84-7N por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EPM7128ELC84-12 | EPM7128SLC84-7N |
|---|---|---|
| Marca | Altera | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $10,40 | $8,75 |
| Family | MAX 7000 (MAX 7000E series) | — |
| Logic Family | CMOS, EEPROM-based | — |
| Usable Gates | 2,500 | — |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 8 | — |
| User I/Os | 84 | — |
| Propagation Delay (tpd1) | 12 ns | — |
| Internal Global Clock Frequency | 90.9 MHz | — |
| Setup Time | 4.5 ns | — |
| Supply Voltage (VCCINT / VCCIO) | 5 V (4.75 V to 5.25 V) | — |
| Temperatura de operação | 0C to +70C (commercial) | 0 C to +70 C (Commercial) |
| Encapsulamento | 84-pin PLCC (J-Lead, QCCJ) | 84-LCC (J-Lead), PLCC-84 |
| Tipo de montagem | Surface Mount (PLCC socket compatible) | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| Contagem de pinos | 84 | — |
| Status RoHS | Non-compliant (legacy 5V part, SnPb finish) | Compliant (lead-free 'N' suffix) |
| Series | — | MAX 7000S |
| Programmable Type | — | In System Programmable (ISP) |
| Tipo de memória | — | EEPROM |
| Number of Macrocells | — | 128 |
| Number of Logic Elements/Blocks | — | 8 (Logic Array Blocks) |
| Number of Usable Gates | — | 2,500 |
| Number of I/O Pins | — | 68 |
| Propagation Delay (tpd) Max | — | 7.5 ns |
| Maximum Operating Frequency | — | 125 MHz |
| Counter Speed (Internal) | — | up to 175.4 MHz (family max) |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V (5 V nominal) |
| Nível MSL | — | [DATA_NEEDED: MSL level] |