EPM7128SLC84-15 vs EPM7128SLC84-7N Comparação
Comparação detalhada lado a lado de EPM7128SLC84-15 por Intel e EPM7128SLC84-7N por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Intel
EPM7128SLC84-15 - 128-Macrocell MAX 7000S CPLD, 84-PLCC | Intel / Altera
EPM7128SLC84-15 ⚠ Última compraComparação de especificações
| Parâmetro | EPM7128SLC84-15 | EPM7128SLC84-7N |
|---|---|---|
| Marca | Intel | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Última compra | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $10,40 | $8,75 |
| Family | MAX 7000S | — |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Macrocells | 128 | — |
| Usable Gates | 2,500 | — |
| User I/Os | 68 (in 84-PLCC) | — |
| Encapsulamento | 84-Pin PLCC (J-Lead, J84) | 84-LCC (J-Lead), PLCC-84 |
| Speed Grade | -15 (15 ns pin-to-pin delay) | — |
| Propagation Delay (tPD) | 15 ns | — |
| Maximum Internal Frequency (fMAX) | 76.9 MHz | — |
| Logic Family / Process | CMOS, 5V, EEPROM | — |
| Supply Voltage (VCCINT) | 5 V | 4.75 V to 5.25 V (5 V nominal) |
| I/O Standard Support | 5.0 V TTL/CMOS (multi-volt I/O compatible with 3.3V) | — |
| Programming Interface | JTAG (IEEE Std. 1149.1), in-system programmable | — |
| Configuration Memory | Non-volatile EEPROM (instant-on, no boot PROM) | — |
| Temperatura de operação | 0C to +70C (commercial) | 0 C to +70 C (Commercial) |
| Status RoHS | Non-RoHS (legacy 5V part) | Compliant (lead-free 'N' suffix) |
| Tipo de montagem | Surface Mount / Socketed (PLCC-84 socket) | Surface Mount |
| Series | — | MAX 7000S |
| Programmable Type | — | In System Programmable (ISP) |
| Tipo de memória | — | EEPROM |
| Number of Macrocells | — | 128 |
| Number of Logic Elements/Blocks | — | 8 (Logic Array Blocks) |
| Number of Usable Gates | — | 2,500 |
| Number of I/O Pins | — | 68 |
| Propagation Delay (tpd) Max | — | 7.5 ns |
| Maximum Operating Frequency | — | 125 MHz |
| Counter Speed (Internal) | — | up to 175.4 MHz (family max) |
| Nível MSL | — | [DATA_NEEDED: MSL level] |