EPM7256AETC100-10N vs EPM7256AETC100-7N Comparação
Comparação detalhada lado a lado de EPM7256AETC100-10N por Altera e EPM7256AETC100-7N por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Altera
EPM7256AETC100-10N - 256-Macro MAX 7000A CPLD, 10ns, TQFP-100 | Intel (Altera)
EPM7256AETC100-10N ObsoleteIntel
EPM7256AETC100-7N - 256-Macrocell MAX 7000A CPLD, 3.3V, 100TQFP | Intel
EPM7256AETC100-7N NrndComparação de especificações
| Parâmetro | EPM7256AETC100-10N | EPM7256AETC100-7N |
|---|---|---|
| Marca | Altera | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | NRND |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $13,10 | $48,75 |
| Family | MAX 7000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 256 | — |
| Usable Gates | 5,000 | — |
| Maximum User I/Os | 84 | — |
| Logic Elements / LABs | 16 Logic Array Blocks | — |
| Pin-to-Pin Logic Delay | 10 ns | — |
| Maximum Operating Frequency | 125 MHz | — |
| Supply Voltage (Core) | 3.3 V | — |
| MultiVolt I/O Support | 2.5 V / 3.3 V / 5.0 V | — |
| Programmability | EEPROM, in-system via JTAG (IEEE 1149.1) | — |
| Encapsulamento | 100-pin TQFP | 100-pin TQFP (14 x 14 mm) |
| Tipo de montagem | Surface Mount | Surface Mount |
| Faixa de temperatura de operação | 0C to +70C (commercial) [DATA_NEEDED: explicit grade from datasheet] | — |
| Process Technology | 0.30 µm EEPROM | — |
| Dedicated Inputs | 4 (global clock / clear / OE) | — |
| Status RoHS | [DATA_NEEDED: not confirmed in provided data] | Compliant |
| Lead-Free / Pb-Free | [DATA_NEEDED: not confirmed in provided data] | — |
| Series | — | MAX 7000A |
| Programmable Type | — | In System Programmable (ISP) |
| Number of Macrocells | — | 256 |
| Number of Logic Elements/Blocks | — | 16 |
| Number of User I/Os | — | 84 |
| Number of Gates | — | 5000 |
| Propagation Delay tPD (max) | — | 7.5 ns |
| Maximum Frequency fCNT | — | 126.6 MHz |
| Supply Voltage - Internal | — | 3.0 V to 3.6 V |
| Temperatura de operação | — | 0 C to 70 C (Commercial) |
| Technology | — | CMOS, EEPROM-based |
| Programming Interface | — | IEEE 1149.1 (JTAG) |