EPM7256AETC100-5N vs EPM7256AETC100-5C Comparação
Comparação detalhada lado a lado de EPM7256AETC100-5N por Altera e EPM7256AETC100-5C por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Altera
EPM7256AETC100-5C - MAX 7000 CPLD, 256 Macrocells, 84 I/O, TQFP-100 | Altera
EPM7256AETC100-5C ObsoleteComparação de especificações
| Parâmetro | EPM7256AETC100-5N | EPM7256AETC100-5C |
|---|---|---|
| Marca | Altera | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Última compra | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $9,75 | $48,90 |
| Family | MAX 7000A | — |
| Series | MAX 7000AE | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 256 | — |
| Usable Gates | 5000 (range 600 to 10000) | — |
| User I/Os | 84 | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| Pin-to-Pin Delay (tPD) | 5.0 ns | — |
| Counter Frequency (fCNT) | up to 227.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.0 V to 3.6 V |
| MultiVolt I/O Support | 2.5 V / 3.3 V / 5.0 V | — |
| Encapsulamento | TQFP-100 (1.0 mm pitch, 14x14 mm) | TQFP-100 |
| Tipo de montagem | Surface Mount | Surface Mount |
| Temperatura de operação | 0C to +70C (Commercial) | 0 °C to +70 °C (commercial) |
| Program Memory | Internal EEPROM | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Status RoHS | Compliant (lead-free) | Non-compliant (Pb-bearing TQFP package) |
| Nível MSL | 3 (168 hours) | — |
| Process Technology | CMOS, EEPROM-based | — |
| Security Bit | Programmable | — |
| Product Family | — | MAX 7000A |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 256 |
| Maximum User I/O | — | 84 |
| Usable Gates (typical) | — | 6400 |
| Propagation Delay (tPD) | — | 5 ns |
| Maximum Counter Frequency (fCNT) | — | 200 MHz |
| I/O Voltage (MultiVolt) | — | 2.5 V / 3.3 V / 5.0 V compatible |
| Programming Technology | — | EEPROM (in-system programmable via JTAG) |
| JTAG Support | — | IEEE Std. 1149.1 boundary-scan |
| Lead-Free | — | No |