EPM9320LC84-10 vs EPM9400LC84-20 Comparação
Comparação detalhada lado a lado de EPM9320LC84-10 por Intel e EPM9400LC84-20 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EPM9320LC84-10 | EPM9400LC84-20 |
|---|---|---|
| Marca | Intel | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | NRND | NRND |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $84,96 | $38,50 |
| Family | MAX 9000 EPLD | MAX 9000 |
| Device | EPM9320 | — |
| Macrocells | 320 | 400 |
| Usable Gates | 6000 (typical) | 8,000 (6,000 to 12,000 typical range) |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O Pins | 168 (varies by package) | — |
| Pin-to-Pin Logic Delay (tPD) | 10 ns | — |
| Maximum Frequency (fCNT) | [DATA_NEEDED: fCNT in MHz] | — |
| Supply Voltage (VCC) | 5.0 V (typical, see datasheet) | — |
| Process Technology | 0.7 µm CMOS EEPROM/UV-EPROM | CMOS EEPROM |
| Encapsulamento | 84-pin PLCC (JEDEC MO-047) | 84-pin PLCC (Plastic Leaded Chip Carrier) |
| Tipo de montagem | Surface Mount (PLCC socket also common) | Surface Mount (PLCC socket or SMT land pattern) |
| Temperatura de operação | 0C to +70C (commercial) [DATA_NEEDED: exact grade suffix] | Commercial (0C to +70C) - assumed from -20 speed grade |
| Programming Interface | JTAG (IEEE 1149.1) boundary-scan, Altera ByteBlaster compatible | — |
| Configuration | Non-volatile EEPROM (instant-on, no boot PROM) | — |
| Status RoHS | ROHS3 Compliant (per fpgalink listing) | [DATA_NEEDED: RoHS status] |
| Nível de sensibilidade à umidade (MSL) | MSL-3, 168 hours (per fpgalink listing) | — |
| Manufacturer Lead Time | 1-7 days (per fpgalink listing) | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Architecture | — | Multiple Array Matrix (MAX), 3rd generation, EEPROM-based |
| Flip-Flops | — | 580 |
| Maximum User I/O | — | 55 |
| Pin-to-Pin Propagation Delay | — | 20 ns (speed grade -20) |
| Maximum Counter Frequency | — | 144 MHz |
| Supply Voltage (VCCINT) | — | 5 V |
| I/O Voltage (VCCIO) | — | 3.3 V or 5 V (configurable) |
| In-System Programming | — | Yes (IEEE 1149.1 JTAG) |