EPM9560GI280-20 vs EPM9560GI280-15 Comparação
Comparação detalhada lado a lado de EPM9560GI280-20 por Intel e EPM9560GI280-15 por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EPM9560GI280-20 | EPM9560GI280-15 |
|---|---|---|
| Marca | Intel | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | NRND | NRND |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $162,50 | $110,00 |
| Device Family | MAX 9000 | MAX 9000 |
| Architecture | CMOS EEPROM-based Multiple Array MatriX (MAX) | CMOS EEPROM, third-generation Multiple Array MatriX (MAX) |
| Technology Node | 5.0 V CMOS EEPROM | — |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 28 (16 macrocells each) | — |
| Usable Gates | 12,000 | — |
| Maximum User I/O Pins | 216 | — |
| Flip-Flops | 772 | 772 |
| Pin-to-Pin Delay (Speed Grade) | 20 ns | — |
| Supply Voltage (VCC) | 5.0 V | — |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG) | 5.0-V ISP via JTAG |
| Programming Technology | EEPROM (non-volatile) | — |
| Encapsulamento | 280-pin PGA (PIN/PEG, square) | 280-pin PGA (ceramic, metal-sealed cofired) |
| Terminal Form | PIN/PEG (through-hole PGA) | — |
| Package Code | PGA | — |
| Temperature Grade | Industrial | — |
| I/O Pin DC Input Range | -0.5 V to VCC + 0.5 V | — |
| Dedicated-Input Pin DC Input Range | -0.3 V to VCC + 0.3 V | — |
| I/O Transient Envelope (no-load, <20 ns) | -2.0 V undershoot to 7.0 V overshoot | — |
| VCC Ramp Requirement | Monotonic rise | — |
| Development Tool | Altera MAX+PLUS II | — |
| Supported HDLs | VHDL, Verilog HDL, AHDL | — |
| Status RoHS | [DATA_NEEDED: RoHS status for GI PGA package] | [DATA_NEEDED: RoHS status] |
| User I/Os | — | 216 |
| Dedicated Inputs | — | 12 |
| Logic Elements / Gates | — | 12,000 usable gates |
| Internal Frequency (fMAX) | — | 145 MHz |
| Propagation Delay (tPD) | — | 11.4 ns |
| Clock-to-Output (tCO) | — | 16.6 ns |
| Supply Voltage (VCCINT/VCCIO) | — | 4.5 V to 5.5 V (3.3 V or 5 V I/O) |
| Temperatura de operação | — | -40 °C to 85 °C (industrial) |
| Process Technology | — | CMOS EEPROM |
| Nível de sensibilidade à umidade (MSL) | — | MSL-3 (168 hours) |