EPM9560RC208-15 vs EPM9560RC208-14 Comparação
Comparação detalhada lado a lado de EPM9560RC208-15 por Altera e EPM9560RC208-14 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Comparação de especificações
| Parâmetro | EPM9560RC208-15 | EPM9560RC208-14 |
|---|---|---|
| Marca | Altera | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $0,00 | $27,90 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EEPROM-based Complex Programmable Logic Device (CPLD) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 12,000 gates | 12,000 |
| Macro Cells | 560 macro cells | — |
| Pin-to-Pin Delay | 15 ns | — |
| Counter Speed | 117.6 MHz | — |
| Tensão de alimentação | 5.0 V | 5 V |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | Yes (JTAG, IEEE 1149.1) |
| Encapsulamento | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (PQFP) |
| Tipo de montagem | Surface Mount | Surface Mount |
| Temperatura de operação | [DATA_NEEDED: operating temperature range] | — |
| Number of I/O Pins | [DATA_NEEDED: number of I/O pins] | — |
| Logic Array Blocks | [DATA_NEEDED: number of logic array blocks] | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (legacy part) |
| Speed Grade | -15 (15 ns pin-to-pin) | — |
| Architecture | Third-generation Multiple Array MatriX (MAX) | — |
| Macrocells | — | 560 |
| Logic Array Blocks (LABs) | — | 16 |
| User I/O Pins | — | 149 |
| Maximum Operating Frequency | — | 117.6 MHz |
| Pin-to-Pin Propagation Delay | — | 14 ns |
| I/O Voltage Support | — | 3.3 V / 5 V |
| Program Memory Type | — | EEPROM (non-volatile) |
| Process Technology | — | 0.35 µm CMOS EEPROM |