EPM9560RC208-15N vs EPM9560RC208-15 Comparação
Comparação detalhada lado a lado de EPM9560RC208-15N por Intel e EPM9560RC208-15 por Altera. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Intel
EPM9560RC208-15N - 560-Macrocell MAX 9000 CPLD, 15ns, 208-RQFP
EPM9560RC208-15N ⚠ Última compraComparação de especificações
| Parâmetro | EPM9560RC208-15N | EPM9560RC208-15 |
|---|---|---|
| Marca | Intel | Altera |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Última compra | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $19,85 | $0,00 |
| Series | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 gates |
| Logic Array Blocks (LABs) | 16 | — |
| User I/O | 212 (in 208-RQFP, see family datasheet) | — |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Maximum Internal Frequency | 117.6 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| Programmability | In-system via IEEE 1149.1 JTAG | — |
| Configuration Memory | CMOS EEPROM (non-volatile) | — |
| Encapsulamento | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Power Quad Flat Pack) |
| Operating Temperature (commercial) | 0C to +70C | — |
| Tipo de montagem | Surface Mount | Surface Mount |
| Status RoHS | [DATA_NEEDED: check part marking suffix for lead-free/RoHS] | [DATA_NEEDED: RoHS status] |
| Speed Grade | -15 (15 ns tPD) | -15 (15 ns pin-to-pin) |
| Architecture | Multiple Array MatriX (MAX) - third generation | Third-generation Multiple Array MatriX (MAX) |
| Family | — | MAX 9000 |
| Macro Cells | — | 560 macro cells |
| Pin-to-Pin Delay | — | 15 ns |
| Counter Speed | — | 117.6 MHz |
| Tensão de alimentação | — | 5.0 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Temperatura de operação | — | [DATA_NEEDED: operating temperature range] |
| Number of I/O Pins | — | [DATA_NEEDED: number of I/O pins] |
| Logic Array Blocks | — | [DATA_NEEDED: number of logic array blocks] |