EPM9560RI240-10 vs EPM9560RI240-15 Comparação
Comparação detalhada lado a lado de EPM9560RI240-10 por Altera e EPM9560RI240-15 por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Intel
EPM9560RI240-15 - 560-Macrocell MAX 9000 CPLD, 15ns, RQFP-240 | Intel
EPM9560RI240-15 ObsoleteComparação de especificações
| Parâmetro | EPM9560RI240-10 | EPM9560RI240-15 |
|---|---|---|
| Marca | Altera | Intel |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Obsolete | Obsolete |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $0,00 | $23,10 |
| Family | MAX 9000 | MAX 9000 |
| Device | EPM9560 | — |
| Logic Elements / Macrocells | 560 macrocells | — |
| Usable Gates | 12,000 | — |
| Propagation Delay (tPD) | 10 ns (speed grade -10) | 15 ns (speed grade -15) |
| Maximum Internal Frequency | 144.9 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Technology | CMOS, EEPROM-based | — |
| User I/Os | 240 pins | — |
| Encapsulamento | RQFP-240 (Power Quad Flat Pack) | RQFP-240 (Power Quad Flat Pack, gull-wing, 0.500 mm pitch) |
| Programming Interface | JTAG (IEEE 1149.1) + ByteBlaster | — |
| Non-Volatile Memory | Yes (EEPROM) | — |
| In-System Programmable | Yes | — |
| Temperatura de operação | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (industrial) |
| Status RoHS | [DATA_NEEDED: RoHS compliance status] | — |
| Product Type | — | EE PLD (Electrically Erasable Programmable Logic Device) |
| Macrocells | — | 560 |
| Flip-Flops | — | 772 |
| User I/Os (industrial grade) | — | 191 |
| Dedicated Inputs | — | 4 |
| Internal Frequency (max) | — | 145 MHz |
| Logic Family / Process | — | CMOS, EEPROM-based |
| Core Voltage | — | 5.0 V |
| I/O Voltage | — | 3.3 V or 5.0 V (configurable) |
| Architecture | — | Multiple Array MatriX (MAX), 3rd generation |
| Tipo de montagem | — | Surface Mount |
| In-System Programmability | — | Yes, JTAG (IEEE Std 1149.1) |
| Power-Up Configuration | — | Instant-on (no external boot PROM) |
| I/O Undershoot Tolerance | — | -2.0 V for <20 ns (no-load) |
| I/O Overshoot Tolerance | — | 7.0 V for <20 ns (no-load) |