RTAX2000SL-CGS624B vs RTAX1000SL-CGS624E Comparação
Comparação detalhada lado a lado de RTAX2000SL-CGS624B por Microchip Technology e RTAX1000SL-CGS624E por Microchip Technology. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Microchip Technology
RTAX2000SL-CGS624B - 2M-Gate Rad-Tolerant FPGA, 624-CCGA | Microchip
RTAX2000SL-CGS624B ✓ AtivoMicrochip Technology
RTAX1000SL-CGS624E - 1M-Gate Rad-Tolerant FPGA CCGA-624 | Microchip
RTAX1000SL-CGS624E ✓ AtivoComparação de especificações
| Parâmetro | RTAX2000SL-CGS624B | RTAX1000SL-CGS624E |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $0,00 | $3.970,00 |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | RTAX-S/SL Radiation-Tolerant FPGA |
| Logic Blocks (CLBs) | 21504 | — |
| Equivalent System Gates | 2000000 | 1000000 gates |
| ASIC Gates | 250000 | — |
| Frequência máxima de clock | 350 MHz | — |
| Process Technology | 0.15 um CMOS | 0.15 um CMOS |
| Tensão de alimentação | 1.5 V | — |
| Programming Technology | Anti-fuse (one-time programmable) | — |
| Embedded Memory | Embedded SRAM with FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Encapsulamento | 624-pin Ceramic Column Grid Array (CCGA) | 624-ball Ceramic Column Grid Array (CGS624) |
| Tipo de montagem | Surface Mount | Surface Mount |
| Radiation Tolerance | Radiation-tolerant (space-flight qualified family) | Radiation-tolerant (space-flight qualified family) |
| Temperatura de operação | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: Operating Temperature] |
| Number of I/Os | [DATA_NEEDED: user I/O count] | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS Status] |
| Qualification | QML per Mil Prf 38535 family (DLA cross-reference qualified program) | — |
| Additional ASIC Gates | — | 125000 gates |
| Configurable Logic Blocks (CLBs) | — | 12096 |
| Maximum System Frequency | — | 581 MHz |
| Core Supply Voltage | — | 1.5 V |
| Configuration | — | Non-volatile anti-fuse, live-at-power-up, single chip |
| Clocking Features | — | Segmentable clocks, chip-wide highway routing |
| Arithmetic Support | — | Dedicated carry logic |
| I/O Count | — | [DATA_NEEDED: User I/O Count] |