RTAX250S-CG624E vs RTAX250SL-CG624E Comparação
Comparação detalhada lado a lado de RTAX250S-CG624E por Microchip Technology e RTAX250SL-CG624E por Microchip Technology. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Microchip Technology
RTAX250S-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250S-CG624E ✓ AtivoMicrochip Technology
RTAX250SL-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250SL-CG624E ✓ AtivoComparação de especificações
| Parâmetro | RTAX250S-CG624E | RTAX250SL-CG624E |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $0,00 | $1.375,00 |
| System Gates | 250000 gates | 250000 |
| Logic Cells (CLBs) | 2816 | 2816 |
| Maximum Toggle Frequency | 649 MHz | — |
| Process Technology | 0.15 um CMOS | 0.15 um CMOS |
| Core Supply Voltage | 1.5 V | 1.5 V |
| Logic Family | CMOS | CMOS |
| CLB Combinatorial Delay (max) | 0.930 ns | — |
| Package Type | CCGA-624 (ceramic column grid array, 624 pins) | — |
| Temperatura de operação | -55C to +125C | -55C to +125C |
| Programming Technology | Antifuse (one-time programmable) | — |
| SEU Hardening | SEU-hardened registers, no external TMR required | — |
| SEU Immunity | Immune to single-event upsets to specified LET threshold; SEU rate < 10-10 errors/bit-day | — |
| Power-Up Behavior | Live at power-up (true single-chip) | — |
| Family | RTAX-S radiation-tolerant FPGA | RTAX-S/SL Radiation-Tolerant FPGA |
| Tipo de montagem | Surface Mount | Surface Mount |
| Target Application | Space-flight systems | — |
| Maximum Frequency | — | 649 MHz |
| Supply Voltage Tolerance | — | +/-0.15 V |
| Maximum Combinatorial Delay | — | 0.93 ns |
| Encapsulamento | — | 624-Pin CCGA (Ceramic Column Grid Array) |
| Radiation Tolerance | — | SEU-hardened registers; SEU rate < 10-10 errors/bit-day |
| Embedded Memory | — | Embedded SRAM with built-in FIFO control logic |
| Clocking | — | Segmentable clocks, chip-wide highway routing |
| Status RoHS | — | [DATA_NEEDED: RoHS status] |
| Programmability | — | Live at power-up, true single-chip |