RTAX4000SL-CG1272B vs RTAX4000S-LG1272V Comparação
Comparação detalhada lado a lado de RTAX4000SL-CG1272B por Microchip Technology e RTAX4000S-LG1272V por Microchip Technology. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Microchip Technology
RTAX4000SL-CG1272B - 4M-Gate Rad-Tolerant FPGA CCGA1272 | Microchip
RTAX4000SL-CG1272B ✓ AtivoMicrochip Technology
RTAX4000S-LG1272V - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000S-LG1272V ✓ AtivoComparação de especificações
| Parâmetro | RTAX4000SL-CG1272B | RTAX4000S-LG1272V |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoria | FPGA & CPLD | FPGA & CPLD |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $0,00 | $9.600,00 |
| Family | RTAX-SL | — |
| Equivalent System Gates | 4,000,000 | 4,000,000 |
| Logic Cells (CLBs) | 40320 | — |
| Process Technology | 0.15 um | — |
| Core Supply Voltage | 1.5 V | 1.5 V nominal |
| Encapsulamento | 1272-pin CCGA (Ceramic Column Grid Array) | LG1272 ceramic column grid array, 1272 pins |
| Programming Type | One-Time Programmable (antifuse) | — |
| Radiation Tolerance | Radiation-tolerant (space-flight qualified family) | RadTolerant RTAX-S family |
| Configuration | Single-chip, live-at-power-up | Live at power-up, single-chip (no external boot device) |
| Tipo de montagem | Surface Mount | Surface Mount |
| Temperatura de operação | [DATA_NEEDED: operating temperature range] | -55C to +125C |
| Max User I/O | [DATA_NEEDED: maximum user I/O count] | — |
| Embedded Memory | [DATA_NEEDED: embedded SRAM block capacity] | — |
| Speed Grade | Standard (non -1 grade) | Standard (unmarked in LG1272V suffix) |
| Nível MSL | [DATA_NEEDED: moisture sensitivity level] | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | — |
| Logic Cells (D-Modules) | — | 60480 |
| CLBs (R-Cells) | — | 40320 |
| Logic Family | — | CMOS, antifuse, one-time programmable |
| Terminal Pitch | — | 1.000 mm |
| SEU Immunity | — | Immune to single-event upsets up to LETTH MeVcm2/mg |
| SEU Rate | — | < 10-10 errors per bit-day |
| SEU-Hardened Registers | — | Yes (eliminates need for TMR) |
| Application Domain | — | Space-flight systems |
| Moisture Sensitivity Level | — | [DATA_NEEDED: MSL level] |