SI53307-B-GM vs SI53306-B-GMR Comparação
Comparação detalhada lado a lado de SI53307-B-GM por Skyworks Solutions e SI53306-B-GMR por Skyworks Solutions. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Skyworks Solutions
SI53307-B-GM - 2:2 Low-Jitter Clock Buffer | Skyworks | 725MHz
SI53307-B-GM ✓ AtivoSkyworks Solutions
SI53306-B-GMR - 1:4 Universal Low-Jitter Clock Buffer | Skyworks
SI53306-B-GMR ✓ AtivoComparação de especificações
| Parâmetro | SI53307-B-GM | SI53306-B-GMR |
|---|---|---|
| Marca | Skyworks Solutions | Skyworks Solutions |
| Categoria | Clock & Timing | Clock & Timing |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $2,12 | $1,92 |
| Função | Universal 2:2 low-jitter clock buffer / level translator | Universal 1:4 low-jitter clock buffer / level translator |
| Input-to-Output Ratio | 2:2 (2 outputs from up to 2 selectable inputs) | — |
| Input Mux | 2:1 with glitchless switching | — |
| Output Channels | 2 differential pairs | — |
| Frequency Range | 1 MHz to 725 MHz | — |
| Tensão de alimentação | 2.97 V to 3.63 V | 2.5 V or 3.3 V |
| Additive Jitter (typ.) | 50 fs RMS (12 kHz to 20 MHz) | — |
| Output Skew | < 50 ps (channel-to-channel) | [DATA_NEEDED: output skew] |
| Supported Output Formats | LVDS, LVPECL, HCSL, LVCMOS, CML, SSTL (pin-selectable) | — |
| Divider Range | ÷1, ÷2, ÷4, ÷8, ÷16, ÷32, ÷64 (per output, pin-selectable) | — |
| Built-in Supply Regulation | Internal LDOs for high PSRR | — |
| PSRR | > 90 dB (low frequency, per datasheet) | — |
| Encapsulamento | 16-QFN (3x3 mm) with exposed pad | 16-pin QFN with exposed pad (3 × 3 mm) |
| Temperatura de operação | [DATA_NEEDED: operating temperature range] | — |
| Tipo de montagem | Surface Mount | Surface Mount |
| Status RoHS | Compliant | Compliant |
| Lead-Free | Yes | Yes |
| Número de saídas | — | 4 (1:4 fanout) |
| Number of Inputs | — | 2 (selectable via glitchless mux) |
| Output Frequency Range | — | 1 MHz to 725 MHz |
| Additive Jitter | — | 50 fs RMS typical (12 kHz to 20 MHz) |
| Input Formats | — | Differential or single-ended (LVCMOS, LVDS, LVPECL, HCSL, SSTL, HSTL) |
| Output Formats | — | Pin-selectable LVPECL, LVDS, HCSL, LVCMOS |
| Built-in LDOs | — | Yes (high PSRR, reduces external components) |
| Propagation Delay | — | [DATA_NEEDED: propagation delay] |
| Divider Options | — | 1, 2, 4, 5, 8, 10, 20, 40, 80, 160 (per output) |
| Faixa de temperatura de operação | — | -40 °C to +85 °C |
| Nível MSL | — | [DATA_NEEDED: MSL level] |