STM32MP135AAC3 vs STM32MP135FAC3 Comparação
Comparação detalhada lado a lado de STM32MP135AAC3 por STMicroelectronics e STM32MP135FAC3 por STMicroelectronics. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
STMicroelectronics
STM32MP135AAC3 - 650MHz Arm Cortex-A7 MPU | STMicroelectronics
STM32MP135AAC3 ✓ Ativo
Comparação de especificações
| Parâmetro | STM32MP135AAC3 | STM32MP135FAC3 |
|---|---|---|
| Marca | STMicroelectronics | STMicroelectronics |
| Categoria | Microcontrollers | Microcontrollers |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $5,49 | $8,64 |
| Core | Arm 32-bit Cortex-A7 with NEON and FPU | Arm Cortex-A7 32-bit RISC |
| Core Frequency (series) | Up to 1 GHz | — |
| Speed Grade (AAC3) | A speed grade (650 MHz per ST eStore listing of A-grade STM32MP135 parts) | — |
| Display Interface | LCD-TFT controller | — |
| Camera Interface | Parallel camera interface | — |
| Ethernet | 2x Ethernet MAC | — |
| CAN | 2x CAN FD | — |
| ADC | 2x ADC (12-bit) | — |
| Timers | 24 timers | — |
| External Memory Support | JEDEC LPDDR2 (JESD209-2E) and LPDDR3 (JESD209-3B), 16-bit interface | — |
| DRAM Data Width | Programmable full (16-bit) or half (8-bit) | — |
| DRAM QoS | Three traffic classes on read, two on write | — |
| Encapsulamento | TFBGA361 | [DATA_NEEDED: exact package marking for STM32MP135FAC3 (TFBGA361 per STM32MP1 nomenclature, confirm on datasheet)] |
| Temperatura de operação | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: temperature grade for suffix 3] |
| Tensão de alimentação | [DATA_NEEDED: core/IO supply voltage] | [DATA_NEEDED: core/IO supply voltage] |
| Tipo de montagem | Surface Mount | Surface Mount |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Core Count | — | 1 |
| Frequência máxima de clock | — | 1 GHz |
| DRAM Support | — | LPDDR2, LPDDR3, LPDDR, DDR3 |
| DRAM Interface Width | — | 16-bit full / 8-bit half (programmable) |
| LPDDR2 Compliance | — | JEDEC JESD209-2E |
| LPDDR3 Compliance | — | JEDEC JESD209-3B |
| Memory Controller QoS | — | 3 read / 2 write traffic classes |
| Product Family | — | STM32MP1 (STM32MP135) |
| Series Status | — | Active |
| Security Features | — | [DATA_NEEDED: security option per part numbering] |