THS1230CDWG4 vs THS1230CDWR Comparação
Comparação detalhada lado a lado de THS1230CDWG4 por Texas Instruments e THS1230CDWR por Texas Instruments. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Texas Instruments
THS1230CDWG4 - 12-Bit 30MSPS Low-Power ADC | Texas Instruments
THS1230CDWG4 ✓ AtivoTexas Instruments
THS1230CDWR - 12-Bit 30 MSPS Low-Power ADC | Texas Instruments
THS1230CDWR ✓ AtivoComparação de especificações
| Parâmetro | THS1230CDWG4 | THS1230CDWR |
|---|---|---|
| Marca | Texas Instruments | Texas Instruments |
| Categoria | ADC/DAC | ADC/DAC |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $4,85 | $5,20 |
| Resolução | 12 bits | 12 bits |
| Sampling Rate (Max) | 30 MSPS | — |
| Number of Channels | 1 | 1 |
| Conversion Time (Max) | 0.033 us (approx. 33 ns) | — |
| Architecture | Pipelined, multi-stage | Pipelined / multi-stage with digital error correction |
| Data Interface | Parallel CMOS | — |
| Analog Input Configuration | Differential or single-ended | — |
| Nominal Supply Voltage | 3.3 V | — |
| Power-Down Feature | Yes (dedicated PD pin) | — |
| Faixa de temperatura de operação | 0C to +70C | — |
| Encapsulamento / Caixa | 28-SOIC (DW), 0.295" / 7.50 mm width | — |
| Tipo de montagem | Surface Mount | Surface Mount |
| Lead-Free / RoHS | Yes (G4 green finish, RoHS compliant) | — |
| Nível MSL | [DATA_NEEDED: MSL moisture sensitivity level] | [DATA_NEEDED: MSL level] |
| Differential Nonlinearity (DNL) | [DATA_NEEDED: DNL in LSB] | — |
| Signal-to-Noise Ratio (SNR) | [DATA_NEEDED: SNR dBFS at fin and Fs] | — |
| Sample Rate | — | 30 MSPS |
| Supply Voltage (AVDD) | — | 3.3 V (single supply) |
| Input Type | — | Configurable: single-ended, single-ended with offset, or differential |
| Analog Input Bandwidth | — | [DATA_NEEDED: analog input bandwidth MHz] |
| SNR | — | [DATA_NEEDED: SNR dBFS at fIN] |
| SFDR | — | [DATA_NEEDED: SFDR dBc at fIN] |
| INL | — | [DATA_NEEDED: INL LSB] |
| DNL | — | [DATA_NEEDED: DNL LSB] |
| Power Dissipation | — | <250 mW at 30 MSPS (typical) |
| Power-Down Mode | — | Yes (hardware PD pin) |
| Digital Output | — | CMOS, parallel 12-bit |
| Temperatura de operação | — | 0 °C to +70 °C (C-grade commercial) |
| Encapsulamento | — | 28-pin SOIC (DW), 7.50 mm body width, tape and reel |
| Status RoHS | — | Compliant |
| Reference | — | Internal (external reference option) |