LAN9250/PT - 10/100 Ethernet Controller w/ PHY | Microchip | TQFP-64
N.º da peça: LAN9250/PT ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $8.5 | $8,50 |
| 10 | $7.65 | $76,50 |
| 100 | $6.8 | $680,00 |
| 500 | $6.1 | $3.050,00 |
| 1.000 | $5.5 | $5.500,00 |
LAN9250/PT Visão geral
An Ethernet controller is a semiconductor device that handles the data-link (MAC) and physical-layer (PHY) functions required to send and receive Ethernet frames. The LAN9250 integrates both the IEEE 802.3 10/100 MAC and the 100BASE-TX PHY in one chip, exposing a simple SPI/I2C slave interface to the host microcontroller. This eliminates the need for an external MAC, external PHY, and an Ethernet-equipped MCU, which reduces BOM cost and PCB area in industrial, building-automation, and IoT designs. The device sits in the network-interface hierarchy as: PHY -> MAC -> Ethernet controller -> communication IC -> semiconductor.
Key features include large transmit and receive FIFOs to accommodate high-latency applications, an efficient memory buffer architecture that optimizes packet granularity, hardware offload features that reduce packet loss, support for HP Auto-MDIX, and built-in support for EtherCAT, Modbus TCP, and other industrial Ethernet protocols. The flexible host bus allows integration with virtually any 8/16/32-bit microcontroller without requiring an external bus interface, and on-chip termination and bias resistors reduce external component count.
Typical applications include industrial control PLCs, factory automation nodes, building-automation gateways, IoT edge devices, motion controllers, EtherCAT slave controllers (when paired with a host MCU running the EtherCAT slave stack), and embedded HMI panels. The integrated PHY and small TQFP-64 footprint make it especially attractive for space-constrained designs that still need a wired industrial Ethernet port.
When designing with this device, ensure the 25 MHz reference clock is stable and low-jitter, route the differential TX/RX pairs as a 100-ohm differential pair on the PCB, and place the 1.8V and 3.3V decoupling capacitors as close to the power pins as possible. The exposed thermal pad must be soldered to a ground copper pour for thermal dissipation.
Alternativas drop-in para LAN9250/PT — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com LAN9250/PT (mesmo formato e footprint) — diferindo em Host Interface, Package.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
LAN9252I/PT
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LAN9250/PT Especificações
| Product Type | Ethernet Controller with integrated PHY |
| Ethernet Speed | 10/100 Mbps (10/100 Base-T/TX) |
| Host Interface | I2C, SPI |
| Encapsulamento | 64-pin TQFP-EP (10x10 mm) |
| Tipo de montagem | Surface Mount |
| Temperatura de operação | -40C to +85C (Industrial) |
| Tensão de alimentação | 3.3 V (with internal 1.8V LDO) |
| Integrated PHY | Yes (10/100 BASE-TX) |
| Auto-MDIX Support | Yes (HP Auto-MDIX) |
| FIFO Buffers | Large TX/RX FIFOs (high-latency support) |
| Industrial Ethernet Protocol Support | EtherCAT slave (with host stack), Modbus TCP, PROFINET (with host stack) |
| Status RoHS | Compliant |
| Lead-Free | Yes |
| Notes | TQFP-EP = TQFP with Exposed Pad for thermal dissipation |
Configuração de pinos do LAN9250/PT
| Pino 1 | TX+ — Differential transmit output (positive) |
| Pino 2 | TX- — Differential transmit output (negative) |
| Pino 3 | RX+ — Differential receive input (positive) |
| Pino 4 | RX- — Differential receive input (negative) |
| Pino 5 | VDDIO — 3.3V I/O supply |
| Pino 6 | VDD33 — 3.3V analog supply |
| Pino 7 | VSS — Digital ground |
| Pino 8 | REF_CLK — 25 MHz reference clock input |
| Pino 9 | RESET — Active-low hardware reset |
| Pino 10 | INT — Active-low interrupt output to host MCU |
| Pino 11 | SCS — SPI chip select (active low) |
| Pino 12 | SCLK — SPI serial clock |
| Pino 13 | MOSI — SPI master-out / slave-in data |
| Pino 14 | MISO — SPI master-in / slave-out data |
| Pino 15 | SDA — I2C serial data (shared with SPI MOSI/MISO mode) |
| Pino 16 | SCL — I2C serial clock (shared with SPI SCLK mode) |
| Pino 17 | GPIO0 — General-purpose I/O / PHY strap |
| Pino 18 | GPIO1 — General-purpose I/O / PHY strap |
| Pino 19 | GPIO2 — General-purpose I/O / link status LED |
| Pino 20 | GPIO3 — General-purpose I/O / activity LED |
| Pino 21 | VDD33A — 3.3V analog supply for PHY |
| Pino 22 | VSSA — Analog ground for PHY |
| Pino 23 | RBIAS — External bias resistor for PHY reference |
| Pino 24 | VDDPLL — 1.8V PLL supply (from internal LDO or external) |
| Pino 25 | VSSPLL — PLL ground |
| Pino 26 | TEST — Test mode pin (tie low in normal operation) |
| Pino 27 | NC — Not connected (per datasheet) |
| Pino 28 | NC — Not connected (per datasheet) |
| Pino 29 | VDDIO — 3.3V I/O supply |
| Pino 30 | MDC — Management data clock (MII mode only) |
| Pino 31 | MDIO — Management data I/O (MII mode only) |
| Pino 32 | VSS — Digital ground |
| Pino 33 | VDD_CORE — 1.8V internal core supply (from internal LDO) |
| Pino 34 | VSS — Digital ground |
| Pino 35 | NC — Not connected (per datasheet) |
| Pino 36 | NC — Not connected (per datasheet) |
| Pino 37 | NC — Not connected (per datasheet) |
| Pino 38 | NC — Not connected (per datasheet) |
| Pino 39 | NC — Not connected (per datasheet) |
| Pino 40 | VDDIO — 3.3V I/O supply |
| Pino 41 | GPIO4 — General-purpose I/O |
| Pino 42 | GPIO5 — General-purpose I/O |
| Pino 43 | GPIO6 — General-purpose I/O |
| Pino 44 | GPIO7 — General-purpose I/O |
| Pino 45 | VSS — Digital ground |
| Pino 46 | VDD33A — 3.3V analog supply for PHY |
| Pino 47 | VSSA — Analog ground for PHY |
| Pino 48 | TX_CLK — MII transmit clock (MII mode only) |
| Pino 49 | TX_EN — MII transmit enable (MII mode only) |
| Pino 50 | TXD0 — MII transmit data 0 (MII mode only) |
| Pino 51 | TXD1 — MII transmit data 1 (MII mode only) |
| Pino 52 | TXD2 — MII transmit data 2 (MII mode only) |
| Pino 53 | TXD3 — MII transmit data 3 (MII mode only) |
| Pino 54 | RX_CLK — MII receive clock (MII mode only) |
| Pino 55 | RX_DV — MII receive data valid (MII mode only) |
| Pino 56 | RXD0 — MII receive data 0 (MII mode only) |
| Pino 57 | RXD1 — MII receive data 1 (MII mode only) |
| Pino 58 | RXD2 — MII receive data 2 (MII mode only) |
| Pino 59 | RXD3 — MII receive data 3 (MII mode only) |
| Pino 60 | RX_ER — MII receive error (MII mode only) |
| Pino 61 | CRS_DV — Carrier sense / data valid (RMII mode) |
| Pino 62 | VSS — Digital ground |
| Pino 63 | VDDIO — 3.3V I/O supply |
| Pino 64 | LINK_LED — Link status LED driver |
| Pino EP | EPAD — Exposed thermal pad - must be soldered to ground pour |
Aplicações típicas
LAN9250/PT é adequado para 6 aplicaçãos: Industrial PLC Ethernet Communication, Building Automation Gateways, EtherCAT Slave Controller Nodes, IoT Edge Devices with Wired Ethernet, Motion Controllers and Servo Drives, Embedded HMI Panels.
Industrial PLC Ethernet Communication
The LAN9250/PT is well-suited for adding a 10/100 Ethernet port to industrial PLCs and remote I/O modules. Its integrated PHY eliminates the need for an external Ethernet transceiver, the SPI host interface (up to 80 MHz) reduces the host MCU's packet-handling load, and the -40C to +85C industrial temperature rating allows deployment in factory-floor environments. HP Auto-MDIX automatically corrects for crossed/straight cables, simplifying field installation. Large TX/RX FIFOs accommodate bursty traffic from multiple sensors while the host MCU runs the control loop, reducing packet loss in time-critical Modbus TCP transactions.
Recomendado
Building Automation Gateways
Building-automation gateways using BACnet/IP, Modbus TCP, or KNXnet/IP benefit from the LAN9250/PT's small PCB footprint, low BOM count, and reliable SPI interface. The integrated 10/100 PHY supports up to 100 m cable runs over CAT5e cabling, sufficient for typical building-floor wiring. The on-chip 1.8V LDO reduces external components to a single 3.3V supply, and the 64-pin TQFP-EP package is easy to assemble with standard reflow profiles. Industrial temperature rating ensures operation in unconditioned mechanical rooms or outdoor enclosures.
Recomendado
EtherCAT Slave Controller Nodes
The LAN9250/PT can serve as the Ethernet interface in EtherCAT slave nodes when paired with a host MCU running the EtherCAT slave stack (e.g., Microchip's LAN9250 SDK or Beckhoff's SSC). The large FIFOs buffer process data so the host MCU can handle the application layer at its own pace, while the integrated PHY meets the strict EtherCAT jitter requirements. For designs that need hardware-offloaded EtherCAT with cycle times as low as 12.5 µs, the LAN9252I/PT is the recommended drop-in upgrade sharing the same TQFP-64 footprint.
Recomendado
IoT Edge Devices with Wired Ethernet
Wired Ethernet remains preferred over Wi-Fi for industrial IoT edge devices due to determinism, security, and reliability. The LAN9250/PT's SPI interface (up to 80 MHz) connects easily to low-cost Cortex-M0+ or Cortex-M4 host MCUs, while the integrated PHY eliminates the external Ethernet transformer interface design work. The 3.3V single-supply operation simplifies power tree design, and the 10x10 mm TQFP-EP package fits in compact edge sensor housings. The large FIFOs also support bursty data uploads from image or vibration sensors without packet loss.
Recomendado
Motion Controllers and Servo Drives
Multi-axis motion controllers and servo drives use EtherCAT or PROFINET for hard real-time communication between the controller and drives. The LAN9250/PT provides the Ethernet interface for distributed motion systems, with large FIFOs and low host CPU overhead critical for sub-millisecond update rates. When used with a host MCU running the PROFINET IRT stack, the LAN9250/PT's HP Auto-MDIX simplifies cabinet wiring, and the industrial temperature rating handles the elevated ambient inside a servo drive enclosure. For higher-performance drives, the LAN9252I/PT provides dedicated EtherCAT offload.
Recomendado
Embedded HMI Panels
Human-Machine Interface (HMI) panels with touchscreens need reliable wired Ethernet for SCADA connectivity, recipe downloads, and remote diagnostics. The LAN9250/PT's small 10x10 mm TQFP-EP footprint fits alongside LCD drivers, touch controllers, and the host MCU on a compact HMI mainboard. The SPI host interface avoids bus contention with the display controller, and the integrated PHY supports cable lengths up to 100 m for installation in control cabinets. Industrial temperature rating and HP Auto-MDIX make field installation forgiving of cable swaps and harsh environments.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para LAN9250/PT — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | LAN9252I/PT | LAN9250-I/PT | KSZ8001LI | W5100 |
|---|---|---|---|---|---|
| Package | 64-pin TQFP-EP (10x10 mm) | 64-pin TQFP-EP (10x10 mm) - same | 64-pin TQFP-EP (10x10 mm) - same | 48-pin LQFP (7x7 mm) - different | 68-pin LQFP (10x10 mm) - different |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | WIZnet |
| Ethernet Speed | 10/100 Mbps | 10/100 Mbps | 10/100 Mbps | 10/100 Mbps | 10/100 Mbps |
| Host Interface | SPI (up to 80 MHz), I2C | SPI (up to 80 MHz), I2C | SPI (up to 80 MHz), I2C | MII/RMII (no SPI/I2C) | SPI (up to 4 MHz), parallel bus |
| Integrated PHY | Yes (10/100 BASE-TX) | Yes (10/100 BASE-TX) | Yes (10/100 BASE-TX) | Yes (10/100 BASE-TX) | No (requires external PHY) |
| Hardware EtherCAT Offload | No (host-stack required) | Yes (dedicated ESC) | No (host-stack required) | No | No |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +85C | -40C to +85C | -40C to +85C | 0C to +70C |
| Auto-MDIX | Yes (HP Auto-MDIX) | Yes | Yes | Yes | No |
| RoHS Compliance | Yes | Yes | Yes | Yes | Yes |
| Typical 1k+ Price | ~$5.50 | ~$6.50 | ~$5.50 | ~$3.50 | ~$4.00 |
Principais diferenciais
- Lowest-cost Microchip Ethernet controller with integrated PHY and SPI host interface (vs KSZ8001LI)
- Faster SPI host interface than legacy controllers (vs W5100)
- Industrial temperature range and HP Auto-MDIX for harsh environments (vs W5100)
Notas de projeto
Route the TX+/TX- and RX+/RX- differential pairs as 100-ohm differential pairs with impedance control, keeping the traces as short as possible and symmetric. Place the 25 MHz reference clock crystal/oscillator within 5 mm of the REF_CLK pin with a guard ground ring, and use a series resistor if the source impedance is low. The exposed thermal pad (EP) MUST be soldered to a continuous ground copper pour with multiple thermal vias for proper heat dissipation. Decoupling: place 0.1 µF and 1 µF ceramic capacitors as close as possible to every VDD33 and VDD33A pin, with the 1 µF cap within 2 mm of the supply pin. The RBIAS resistor must be 12.4 kohm 1% to ground - do not omit this component, the PHY will not function without it.
The LAN9250/PT is shipped in a state where the host interface selection (SPI vs I2C) is determined by strap pins or host-software configuration - read the datasheet section on chip initialization carefully. Do not assume SPI mode is default; verify with the SCS pin state at reset. For industrial EtherCAT designs, the LAN9250/PT requires the EtherCAT slave stack on the host MCU - if you need hardware-offloaded EtherCAT (cycle times under 100 µs), use the LAN9252I/PT instead. Do not exceed the absolute maximum supply voltage of 3.6V on any VDD33 pin or the device will be damaged.
Separate the analog PHY section (TX/RX pins, RBIAS, PLL) from the digital section (SPI/I2C, GPIO) with a ground split or guard trace, and use a ferrite bead or separate regulator islands for VDD33A. The 25 MHz reference clock trace should be at least 3x trace-width away from any switching signal, and surrounded by ground. Avoid routing any high-speed digital signal under the magnetics. The TQFP-EP package benefits from a 4-layer PCB with a dedicated ground plane under the IC - this reduces EMI emissions and improves EMC compliance for industrial certifications (CE, FCC Class A).
Informações de conformidade
RoHS compliant per Microchip product page. LAN9250/PT is not AEC-Q100 qualified - it is designed for industrial (not automotive) applications. For automotive Ethernet, consider the LAN9250 family automotive derivatives or TJA1100 PHY.