LAN9313I-NZW - 3-Port 10/100 Managed Ethernet Switch | Microchip
N.º da peça: LAN9313I-NZW ✓ AtivoLAN9313I-NZW Visão geral
A managed Ethernet switch is an active network device that learns MAC addresses and forwards frames between ports with filtering, VLAN tagging and priority handling, rather than repeating traffic blindly like a hub. In the product-type hierarchy, this part sits as an Ethernet switch, inside Ethernet interface controllers, inside network interface ICs, and finally inside integrated circuits for data communication. The LAN9313 family is the managed-switch branch of the 10/100 family; the LAN8710/LAN8720 parts are unmanaged or single-port alternatives, and the LAN9115/LAN9215 parts are single-port controllers rather than switches.
Key features include three integrated 10/100 Ethernet PHYs in one device, a 16-bit MII interface to the host processor, hardware-based frame handling that offloads forwarding work from the MCU, 802.1Q VLAN support, 802.1D spanning-tree-aware managed switching, and a 48 MHz or 25 MHz crystal-free clocking option that reduces external component count. The three PHYs each support auto-negotiation, auto-polarity correction and auto-MDIX, so each port connects directly to a magnetics-based RJ-45 without manual crossover handling.
The device integrates the digital switching core, the three PHY analog front ends and the MII host interface in one package, which removes the need for an external switch ASIC plus discrete PHYs. Because the MII interface is parallel rather than serial RMII, the host processor must provide a 16-bit data bus and a reference clock, which is straightforward on most industrial 32-bit microcontrollers and application processors with sufficient GPIO and DMA capability.
Typical uses include industrial Ethernet gateways, factory floor controllers, embedded routers, set-top and access equipment, printer and copier network interfaces, and any embedded product that needs to fan out a single host processor to three wired Ethernet ports while retaining VLAN and traffic-management control.
When designing around this part, budget the MII bus carefully: it needs roughly 16 data lines plus control signals, and the host processor must supply a 25 MHz or 50 MHz reference clock with the correct phase relationship. Place the 1.2 V and 3.3 V decoupling capacitors close to the supply pins and keep the exposed pad tied to ground for thermal performance.
This page consolidates manufacturer datasheet data, distributor availability, package details, drop-in alternatives and practical layout guidance for engineers who want everything about the LAN9313I-NZW in a single reference rather than spread across datasheet pages and distributor listings.
Alternativas drop-in para LAN9313I-NZW — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com LAN9313I-NZW (mesmo formato e footprint) — diferindo em Host Interface, Package, Ethernet Speed, Product Type.
LAN9313-NZW
✅ Drop-InConsulte o preço
Ver ficha técnica →LAN9313I-NZ
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
LAN9115-MT
✅ Drop-InConsulte o preço
Ver ficha técnica →LAN9115B-MT
✅ Drop-In ⚠️ Especificações não verificadas📋 Alternativa de referência (fora do catálogo)
LAN9313I-NZW Classificações máximas e características elétricas
| Device Type | 3-Port 10/100 Managed Ethernet Switch |
| Number of Ports | 3 |
| Ethernet Speed | 10 Mbps / 100 Mbps per port |
| Host Interface | MII (Media Independent Interface), parallel |
| Integrated PHYs | 3 x 10/100 BASE-T/TX PHY |
| Tensão de alimentação | 3.3 V |
| Corrente de alimentação | 135 mA |
| Encapsulamento | 128-lead XVTQFP (14 x 14 mm) with exposed pad |
| Contagem de pinos | 128 pins |
| Temperatura de operação | -40 C to +85 C |
| Protocol Compliance | IEEE 802.3 (10BASE-T, 100BASE-TX, full/half duplex) |
| Management Standards | IEEE 802.1D, IEEE 802.1Q |
| Tipo de montagem | Surface Mount |
| Packaging | Tray |
| Auto-Negotiation | Yes |
| Auto-MDIX / Auto-Polarity | Yes |
| Manufacturer | Microchip Technology |
| Ethernet Link Speeds | 10BASE-T and 100BASE-TX |
Guia de Configuração de Pinos do LAN9313I-NZW 128-lead xvtqfp (14 x 14 mm) with exposed pad
Configuração de pinos para LAN9313I-NZW (pacote 128-lead xvtqfp (14 x 14 mm) with exposed pad). A numeração dos pinos, funções e diagramas de conexão estão definidos no datasheet do fabricante. Consulte-o para o footprint exato e diretrizes de soldagem.
Nenhum dado detalhado de pinagem disponível para LAN9313I-NZW.
Consulte a ficha técnica para a configuração completa dos pinos.
Aplicações típicas
LAN9313I-NZW é adequado para 6 aplicaçãos: Industrial Ethernet Gateway and Controller, Embedded Router and Network Appliance, Test and Measurement Front-End, Building Access and Security Terminal, Set-Top Box and Consumer Network Appliance, Automotive and Harsh-Environment Embedded Node.
Industrial Ethernet Gateway and Controller
The LAN9313I-NZW suits factory gateways that must expose three wired 10/100 ports while the host MCU stays free for control loops. Its three integrated PHYs with auto-negotiation and auto-MDIX remove the need for external magnetics crossover handling, so each port connects straight to a standard RJ-45 with 1:1 isolation. The parallel MII interface moves frame forwarding into dedicated switch hardware rather than the MCU, which is the decisive advantage over a single-port controller in a three-port gateway. With operation rated to -40 C to +85 C, the device fits unheated plant-floor enclosures, and 802.1Q VLAN support lets machine networks be segmented from plant IT traffic.
Recomendado
Embedded Router and Network Appliance
Network appliances such as protocol gateways, print servers and small VPN boxes typically need several isolated copper ports, and the LAN9313I-NZW provides all three from one 3.3 V device. Because it implements the IEEE 802.1D and 802.1Q management specifications, the appliance can present VLAN-tagged traffic to a virtual LAN boundary without adding a separate switch ASIC to the bill of materials. The managed switching core handles address learning and filtering in hardware, so the host processor spends its cycles on routing and application tasks. The trade-off to plan for is the parallel MII bus: it consumes roughly 16 data lines plus control signals and demands a clean 25 MHz or 50 MHz reference clock from the host.
Recomendado
Test and Measurement Front-End
Instrumentation front ends frequently need several Ethernet sockets for instrument control, synchronization and data capture, and the LAN9313I-NZW fits that role with three managed 10/100 ports sharing one host interface. Because the switching fabric forwards frames in hardware, a data logger does not have to poll or re-broadcast traffic in software, which keeps measurement timing independent of network traffic. The 128-lead 14 x 14 mm TQFP footprint with exposed pad keeps the part small enough for bench-top and rack-mount enclosures, and the -40 C to +85 C rating covers unheated remote monitoring cabinets. Care is needed in layout because the analog PHY sections are sensitive to the switching current paths created by the host clock and MII activity.
Recomendado
Building Access and Security Terminal
Access control readers, door stations and video-doorbell terminals benefit from having a network port for management and additional ports for cameras or local peripherals. The LAN9313I-NZW gives such a terminal three managed 10/100 ports, so a camera, a reader and a backhaul link can share one device while VLAN policies isolate the security domains. Auto-negotiation on every port means the terminal can be deployed against existing 10BASE-T or 100BASE-TX cabling without manual speed configuration, and auto-MDIX allows straight-through patch cables in the field. The -40 C to +85 C industrial temperature range suits outdoor and entryway enclosures where a commercial-grade part would be marginal.
Recomendado
Set-Top Box and Consumer Network Appliance
Set-top boxes, smart gateways and network storage appliances typically expose several LAN ports to the home, and the LAN9313I-NZW consolidates three of them behind a single MII interface. Integrated PHYs eliminate three external PHY devices and their individual magnetics interface requirements, which reduces board area and simplifies the bill of materials compared with a discrete switch design. VLAN and priority handling support lets the appliance apply traffic classes for video, voice and data on the same physical ports. The main constraint is host bandwidth: the parallel MII runs at 100 MHz for 100BASE-TX traffic, so the host processor needs sufficient DMA and bus bandwidth to carry aggregate traffic across three ports without starving its primary application.
Recomendado
Automotive and Harsh-Environment Embedded Node
Body controllers, telematics units and diagnostic nodes in vehicles or heavy equipment need rugged Ethernet connectivity alongside other embedded functions. The LAN9313I-NZW supplies three managed 10/100 ports on a single 3.3 V rail, so a telematics node can bridge a service port, an internal network port and a diagnostic link. Its -40 C to +85 C industrial rating covers the demanding ambient range of vehicle and machinery environments better than a commercial-grade switch. Because the exposed thermal pad must be tied to a solid ground pour, and the PHY analog sections share that supply domain, the layout must include a dedicated low-impedance plane region and dense via stitching under the pad to keep junction temperature under control at sustained link activity.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para LAN9313I-NZW — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | LAN9313-NZW | LAN9313I-NZ | LAN9115-MT | LAN9115B-MT |
|---|---|---|---|---|---|
| Package | 128-lead XVTQFP (14 x 14 mm) | 128-lead XVTQFP (14 x 14 mm) - identical | 128-lead TQFP with exposed pad - identical | 128-lead TQFP (14 x 14 mm) - identical | 128-lead TQFP (14 x 14 mm) - identical |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Port Count | 3 x 10/100 | 3 x 10/100 | 3 x 10/100 | 1 x 10/100 | 1 x 10/100 |
| Host Interface | Parallel MII | Parallel MII | Parallel MII | Parallel MII | Parallel MII |
| Supply Voltage | 3.3 V | 3.3 V | 3.3 V | 3.3 V | 3.3 V |
| Ethernet Protocol Compliance | IEEE 802.3 (10BASE-T, 100BASE-TX) | IEEE 802.3 (10BASE-T, 100BASE-TX) | IEEE 802.3 (10BASE-T, 100BASE-TX) | IEEE 802.3 (10BASE-T, 100BASE-TX) | IEEE 802.3 (10BASE-T, 100BASE-TX) |
| Pin Count | 128 pins | 128 pins | 128 pins | 128 pins | 128 pins |
Principais diferenciais
- Three integrated 10/100 PHYs and a managed switching core in a single 14 x 14 mm TQFP (vs LAN9115-MT)
- Managed switching with VLAN and spanning-tree-aware forwarding handled in hardware (vs LAN9115-MT)
- Industrial temperature grade for unheated and harsh environments (vs LAN9313-NZW)
Notas de projeto
The LAN9313I-NZW uses a 128-lead 14 x 14 mm TQFP with an exposed pad, so the land pattern must be taken from the manufacturer drawing rather than a generic TQFP library entry. Solder the exposed pad to a dedicated ground region and place a dense via array under it for thermal and low-inductance grounding. Keep the PHY line-side connections to the magnetics short, symmetric and away from the switching core supply routing, because the 10/100 analog front ends are sensitive to common-mode noise injected by fast MII edges.
Estimated: the device draws about 135 mA at a 3.3 V supply, so the 3.3 V rail must deliver roughly 0.45 W for the switch itself before host and magnetics bias currents are added. Place the bulk 3.3 V capacitor within about 5 mm of the supply pins and add 100 nF ceramic decoupling at each supply pin group. Route the supply with a wide, short path and stitch ground vias along the exposed pad perimeter to minimise loop area on the switching current return path.
The parallel MII interface is a 100 MHz-class synchronous bus, so treat it as a controlled-impedance route rather than a general-purpose signal. Keep MII TXD/RXD traces short, length-matched within the budget given in the manufacturer data sheet, and terminated per the host processor requirements. Provide the host reference clock (25 MHz or 50 MHz) from a low-jitter source with clean return paths, and keep the clock and MII traces away from the magnetics-side traces to avoid coupling into the PHY receivers.
Two errors dominate integration problems. First, the MII reference clock must meet the specified phase relationship to the MII data signals; a clock derived by dividing an unrelated system clock will cause framing errors that look like PHY faults. Second, the LED and strap pins are configurable at reset, so pull resistors must be placed according to the strap table in the manufacturer data sheet rather than left floating. Confirming the 3.3 V rail sequencing and the reset release timing before enabling traffic avoids most field failures.
Informações de conformidade
Ethernet interface IC for commercial and industrial equipment rather than an automotive-qualified device; the I ordering code denotes the -40 C to +85 C industrial temperature grade. RoHS, REACH, lead-free and halogen-free declarations should be confirmed against the current Microchip product page and material declaration before release.
